We report the interface characterization of Al2O3/AlN/GaN MOS (metal-oxide-semiconductor) structures with an AlN interfacial layer. A thin monocrystal-like interfacial layer (AlN) is formed at the Al2O3/GaN to effectively block oxygen from the GaN surface and prevent the formation of detrimental Ga-O bonds. The suppression of Ga-O bonds is validated by X-ray photoelectron spectroscopy of the critical interface. Frequency-dispersion in C-V characteristics has been significantly reduced, owing to improved interface quality. Furthermore, using the conventional conductance method suitable for extracting the interface trap density D-it in MOS structures, Dit in the device with AlN was determined to be in the range of 10(11)-10(12) eV(-1) cm(-2), showing one order of magnitude lower than that without AlN. Border traps near the gate-dielectric/GaN interface were identified and shown to be suppressed by the AlN interfacial layer as well. (C) 2015 AIP Publishing LLC.

The oxidation mechanism in self-terminating wet etching technique with thermal oxidation of AlGaN layer followed by etching in KOH solution is investigated. Spike-shape remnants of oxidised AlGaN are observed at the initial stage of wet etching in KOH solution, which could be completely etched away after enough etching time. Transmission electron microscope/energy dispersive spectroscopy analysis indicates the existence of crystalline AlGaN inside the remnants. Finally, a possible explanation is given that the oxide channels from AlGaN surface towards AlGaN/GaN interface generated during thermal oxidation are firstly etched away at the initial stage of KOH wet etching, then after enough time these remnants with non-c axis crystal orientation surfaces exposed to KOH solution could be completely etched away leaving GaN layer beneath unaffected, which realises self-terminating etching.

High-temperature transport properties in high-mobility lattice-matched InAlN/GaN heterostructures have been investigated. An interesting hysteresis phenomenon of the two dimensional electron gas (2DEG) density is observed in the temperature-dependent Hall measurements. After high-temperature thermal cycles treatment, the reduction of the 2DEG density is observed, which is more serious in thinner InAlN barrier samples. This reduction can then be recovered by light illumination. We attribute these behaviors to the shallow trap states with energy level above the Fermi level in the GaN buffer layer. The electrons in the 2DEG are thermal-excited when temperature is increased and then trapped by these shallow trap states in the buffer layer, resulting in the reduction and hysteresis phenomenon of their density. Three trap states are observed in the GaN buffer layer and CGa may be one of the candidates responsible for the observed behaviors. Our results provide an alternative approach to assess the quality of InAlN/GaN heterostructures for applications in high-temperature electronic devices. (C) 2015 AIP Publishing LLC.

In this paper, we report the device performance of a high-voltage normally off Al2O3/GaN MOSFET on the Si substrate. Normally off operation is obtained by multiple cycles of O-2 plasma oxidation and wet oxide-removal gate recess process. The recessed normally off GaN MOSFET with 3 mu m gate-drain distance exhibits a maximum drain current of 585 mA/mm at 9 V gate bias. The threshold voltage of the MOSFET is 2.8 V with a standard derivation of 0.2 V on the sample with an area of 2 x 2 cm(2). The gate leakage current is below 10(-6) mA/mm during the whole gate swing up to 9 V and the I-ON/I-OFF ratio is larger than 10(9), indicating the good quality of Al2O3 gate insulator. The MOSFET with 10 mu m gate-drain distance shows a three terminal OFF-state breakdown voltage (BV) of 967 V at zero gate-source bias with a drain leakage current criterion of 1 mu A/mm. The specific ON-resistance (R-ON,R- SP) of the device is 1.6 m Omega . cm(2) and the power figure of merit (BV2/R-ON,R- SP) is 584 MW/cm(2).

High temperature characteristics of GaN-based inverter is presented from room temperature (RT) to 300 degrees C, which is integrated with enhancement-mode MOSFET and depletion-mode HEMT. At 300 degrees C, the fabricated inverter operates properly at a supply voltage (V-DD) of 7 V with 6.5 V for logic voltage swing, 3.3 V for threshold voltage (V-TH), 2.4 V for logic-low noise margin (NML), and 3.4 V for logic-high noise margin (NMH). Meanwhile, the inverter exhibits small variations from RT to 300 degrees C in terms of logic voltage swing, V-TH, NML, and NMH with the maximum relative variations of 2.2%, 5.7%, 12.9%, and 4.9% in such temperature range, respectively.

A self-terminating gate recess wet etching technique with thermal oxidation of the AlGaN/GaN layer followed by etching in potassium hydroxide (KOH) solution was recently proposed by the present authors for normally-off AlGaN/GaN metal-oxide semiconductor field effect transistors (MOSFETs). In this present reported work, the oxidation process inside the AlGaN/GaN heterostructure involved in this technique was analysed using several material characterisation methods. The measurement results show that the concentration and depth of the O element distribution increase with increased thermal oxidation temperature. It is worth noting that after 650 degrees C oxidation almost no O element could be found in the GaN layer and the O element mainly locates in the AlGaN layer with an obvious correlation between the distribution of Al and O elements, where the Al(Ga)-oxide was detected by X-ray photoelectron spectroscopy, which could be etched by 70 degrees C KOH. Thus, self-terminating wet etching on the AlGaN/GaN material is achieved.

Based on our proposed self-terminating gate recess etching technique, normally-off recess-gated AlGaN/GaN MOSFET has been demonstrated with a novel method using GaN cap layer (CL) as recess mask, which, as a result, simplifies the device fabrication process and lowers the fabrication cost. The GaN CL is capable of acting as an effective recess mask for the gate recess process, which includes a thermal oxidation for 45 min at 650 degrees C followed by 4-min etching in potassium hydroxide (KOH) at 70 degrees C. After gate recess process, no obvious change is observed in terms of the surface morphology of the GaN CL, the contact resistance of the Ohmic contact formed directly on the GaN CL as well as the sheet resistance of the two-dimensional electron gas (2-DEG) channel layer under the GaN CL. The fabricated device exhibits a threshold voltage (V-th) as high as 5 V, a maximum drain current (I-dmax) of similar to 200 mA/mm, a high ON/OFF current ratio of similar to 10(10) together with a low forward gate leakage current of similar to 10(-5) mA/mm. Meanwhile, the OFF-state breakdown voltage (V-br) of the device with gate-drain distance of 6 mu m is 450 V.

Postgate annealing (PGA) in N-2/O-2 atmosphere at 300 degrees C for various annealing time is performed on enhancement mode AlGaN/GaN MOSFET fabricated using a self-terminating gate recess etching technique. After 45-min annealing, the device OFF-state leakage current decreases by more than two orders of magnitude and thus a low OFF-state leakage current of similar to 10(-13) A/mm is obtained at room temperature, resulting in an excellent ON/OFF current ratio of similar to 10(12). At 250 degrees C, the device still exhibits a low OFF-state leakage current of similar to 10(-9) A/mm and high ON/OFF current ratio of similar to 10(8). Meanwhile, a strong correlation between the OFF-state leakage current and mesa isolation current is observed as we change the annealing time: 1) the lower the mesa isolation current and 2) the lower the OFF-state leakage current and thus the higher the ON/OFF current ratio. It is the suppression of the mesa isolation current owing to the passivation of atomic layer deposition Al2O3 that leads to the improvement of the OFF-state leakage current and ON/OFF current ratio after PGA. Besides, the device shows no obvious change in terms of its threshold voltage and maximum drain current after PGA.

In this letter, we investigated the behaviors of surface-and buffer-induced current collapse in AlGaN/GaN high-electron mobility transistors (HEMTs) using a soft-switched pulsed I-V measurement with different quiescent bias points. It is found that the surface-and buffer-related current collapse have different relationship with the gate and drain biases (V-GS0, V-DS0) during quiescent bias stress. The surface-induced current collapse in devices without passivation monotonically increases with the negative V-GS0, suggesting that an electron injection to the surface from gate leakage is the dominant mechanism and the Si3N4 passivation could effectively eliminate such current collapse. The buffer-induced current collapse in devices with intentionally carbon-doped buffer layer exhibits a different relationship with V-GS0 after surface passivation. The buffer-related current collapse shows a bell-shaped behavior with V-GS0, suggesting that a hot electron trapping in the buffer is the dominant mechanism. The soft-switched pulsed I-V measurement provides an effective method to distinguish between the surface-and buffer-related current collapse in group III-nitride HEMTs.

A novel simple approach to extract parasitic source and drain resistances of high electron mobility transistors (HEMT) is presented. This method could obtain the parasitic resistances by determining the portion of channel resistance involved in the measured end-resistance based on the identification of the channel position corresponding to the measured floating-gate voltage with the floating-gate, drain-and source-current-injection configurations on a single device. The technique is demonstrated on AlGaN/GaN HEMTs. It is found that the ratio of the channel resistance involving in the end-resistance to the total channel resistance approaches to a constant independent on the gate length, which could simplify the practical application of this novel method. The experimental results show that the source and drain resistances extracted by this method coincide with series resistance extracted by traditional Transmission Line Model (TLM) measurement. (C) 2014 Elsevier Ltd. All rights reserved.

We report a high-performance normally-off Al2O3/AlN/GaN MOS-channel-high electron mobility transistor (MOSC-HEMT) featuring a monocrystalline AlN interfacial layer inserted between the amorphous Al2O3 gate dielectric and the GaN channel. The AlN interfacial layer effectively blocks oxygen from the GaN surface and prevents the formation of detrimental Ga-O bonds. Frequency-dispersion in C-V characteristics and threshold voltage hysteresis are effectively suppressed, owing to improved interface quality. The new MOSC-HEMTs exhibit a maximum drain current of 660 mA/mm, a field-effect mobility of 165 cm(2)/V . s, a high ON/OFF drain current ratio of similar to 10(10), and low dynamic ON-resistance degradation.

This letter reports a normally-OFF Al2O3/GaN gate-recessed MOSFET using a low-damage digital recess technique featuring multiple cycles of plasma oxidation and wet oxide removal process. The wet etching process eliminates the damage induced by plasma bombardment induced in conventional inductively coupled plasma dry etching process so that good surface morphology and high interface quality could be achieved. The fully recessed Al2O3/GaN MOSFET delivers true enhancement-mode operation with a threshold voltage of +1.7 V. The maximum output current density is 528 mA/mm at a positive gate bias of 8 V. A peak field-effect mobility of 251 cm(2)/V.s is obtained, indicating high-quality Al2O3/GaN interface.

A self-terminating gate recess etching technique is first proposed to fabricate normally off AlGaN/GaN MOSFET. The gate recess process includes a thermal oxidation of the AlGaN barrier layer for 40 min at 615 degrees C followed by 45-min etching in potassium hydroxide solution at 70 degrees C, which is found to be self-terminated at the AlGaN/GaN interface with negligible effect on the underlying GaN layer, manifesting itself easy to control, highly repeatable, and promising for industrialization. The fabricated device based on this technique with atomic layer deposition Al2O3 as gate insulator exhibits a threshold voltage as high as 3.2 V with a maximum drain current over 200 mA/mm and a 60% increased breakdown voltage than that of the conventional high electron mobility transistors.

AlGaN/GaN metal oxide semiconductor high electron mobility transistors (MOSHEMTs) with thick (>35 nm), high-kappa (TiO2/NiO), submicrometer-footprint (0.4 mu m) gate dielectric are found to exhibit two orders of magnitude in lower gate leakage current (similar to 1 nA/mm up to +3-V applied gate bias), higher I-MAX (709 mA/mm), and higher drain breakdown voltage, compared to Schottky barrier (SB) HEMTs of the same geometry. The maximum extrinsic transconductance of both the MOSHEMTs and the SBHEMTs with 2 x 80-mu m gate fingers is measured to be 149 mS/mm. The addition of the submicrometer-footprint gate oxide layer only results in a small reduction of the current gain cutoff frequency (21 versus 25 GHz, derived from S-parameter test data) because of the high permittivity (kappa approximate to 100) of the gate dielectric. This high-performance submicrometer-footprint MOSHEMT is highly promising for microwave power amplifier applications in communication and radar systems.

Kink effects are studied in conventional AlGaN/GaN high-electron-mobility transistors by measuring their current-voltage characteristics with various bias sweeping conditions at drain and gate terminals. It is found that the kink effect is induced by drain and gate pumping. The magnitude of kink is directly related to the maximum drain voltage and current levels during on-state operation. The hot electrons in the 2-D electron gas channel generated under high drain bias could be injected into the adjacent epitaxial buffer layer where they can be captured by donor-like traps. Hot electron trapping and the subsequent field-assisted de-trapping is suggested to be the dominant mechanism of kink generation in the studied device. The extracted activation energy of the traps accounting for the kink effect is 589 +/- 67 meV from temperature-dependent transient measurement, and is close to the energy of the E-2 trap widely reported in GaN layers.

Improvement of the AlGaN/GaN high-electron mobility transistor's (HEMT's) OFF-state breakdown voltage is achieved by implanting (19)F(+) ions at an energy of 50 keV and dose of 1 x 10(12) cm(-2) under the gate region using BF(3) as the source. The charge state of the implanted fluorine ions changes from positive to negative in the AlGaN/GaN structure because of fluorine's strong electronegativity. The negative-charged fluorine ions at the back side of the two-dimensional electron gas can raise the energy barrier of the GaN buffer layer under the channel, effectively blocking the current injected from the source to the high-field region of the GaN channel when the HEMT is biased at OFF-state. The source-injected electrons, if not blocked, could flow to the high-field region and initiate a premature three-terminal OFF-state breakdown in a conventional AlGaN/GaN HEMT. A 38% improvement of the three-terminal OFF-state breakdown voltage and 40% improvement of the power figure-of-merit V(BD-off)(2)/R(on) are achieved in the enhanced back barrier HEMT.

This paper presents a fabrication technology of enhancement-mode AlGaN/GaN high electron mobility transistors (HEMTs) using standard fluorine ion implantation. An 80 nm silicon nitride layer was deposited on the AlGaN as an energy-absorbing layer that slows down the high energy (similar to 25 keV) fluorine ions so that majority of the fluorine ions are incorporated in the AlGaN barrier. The threshold voltage was successfully shifted from -1.9 to +1.8 V, converting depletion mode HEMTs to enhancement-mode ones. The fluorine ion distribution profile was confirmed by Secondary Ion Mass Spectrometry (SIMS). (C) 2011 The Electrochemical Society. [DOI: 10.1149/1.3562273] All rights reserved.

AlGaN/GaN high-electron mobility transistor's (HEMT's) off-state breakdown is investigated using drain-current injection techniques with different injection current levels. Competitions between the source leakage and gate leakage, pure leakage and impact ionization, and source-and gate-injection-induced impact ionization during the drain-injection measurement are discussed in detail. It was found that the breakdown originates from the source/gate leakage at low drain injection levels but is dominated by source/gate-induced impact ionization process at high drain injection currents. The source-induced impact ionization usually precedes the gate-induced impact ionization in low-gate leakage devices, resulting in a premature three-terminal off-state breakdown. We also found that the gate-bias value affects the breakdown voltage in the conventional three-terminal off-state breakdown I-V measurement and should be carefully considered.

Modulations of energy band and polarization field by fluorine ions in fluorine plasma treated AlGaN/GaN heterostructures were revealed by positron annihilation spectroscopy (PAS). It is found that the annihilation probability is mainly governed by the electric field in the AlGaN/GaN heterostructure, which could be modulated by charged ions, opposite to what was first expected from the large number of plasma-induced defects such as Ga-vacancies. The modulation of electric field is successfully observed through the opposite changes in the S parameters on the two sides of the hetero-interface after fluorine plasma treatment due to the opposite E-field directions. Fluorine is experimentally proved to be negatively charged in GaN related materials, which is consistent with the operation principle of enhancement-mode AlGaN/GaN HEMT fabricated by fluorine plasma treatment. It is also suggested that PAS is a useful tool to probe the intrinsic electric field in AlGaN/GaN system. (C) 2010 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim