科研成果 by Type: Conference Paper

2024
Zhou Y, Huang W, Zhu R, HUANG R, Tang K. A Reliable 2 bit MLC FeFET with High Uniformity and 109 Endurance by Gate Stack and Write Pulse Co-optimization, in 2024 IEEE European Solid-State Electronics Research Conference (ESSERC).; 2024:657-660.
Zhu R, Zhou Y, Sun C, Huang W, Dong J, HUANG R, Tang K. Improved Memory Density and Endurance by a Novel 1T3C FeFET for BEOL Multi-level Cell Memory, in 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM).; 2024:1-3.
Zhou Y, HUANG R, Tang K. A Novel Hybrid-FE-layer FeFET with Enhanced Linearity for On-chip Training of CIM Accelerator, in 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM).; 2024:1-3.
Shao H, Fu B, Yang J, Luo W, Su C, Fu Z, Tang K, HUANG R. IMCE: An In-Memory Computing and Encrypting Hardware Architecture for Robust Edge Security, in 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE).; 2024:1-6.
2023
Shao H, Zhou Y, Huang W, Su C, Fu Z, Luo W, Tang K, HUANG R. A Novel FeFET Array-Based PUF: Co-optimization of Entropy Source and CRP Generation for Enhanced Robustness in IoT Security, in 2023 IEEE International Electronic Device Meeting (IEDM). San Fransisco; 2023:18.4.1-18.4.4.
2022
Zhou Y, Liang Z, Luo W, Yu M, Zhu R, Lv X, Li J, Huang Q, Liu F, Tang K, et al. Ferroelectric and Interlayer Co-optimization with In-depth Analysis for High Endurance FeFET, in 2022 International Electron Devices Meeting (IEDM).; 2022:6.2.1-6.2.4.Abstract
In face of the critical endurance issue, for the first time we take a holistic perspective to co-optimize the ferroelectric materials and interlayer in FeFET. Compared to the common HZO based gate stack, the novel combination of Hf0.95 Al0.05 O2+Al2 O3 enhances the endurance to $\gt 5 \times 10 ^9$ cycles while maintaining a retention > 10 years. In-depth analysis based on DFT and DQSCV reveal the reduction of interlayer electric field and interface charge trapping as the mechanism of optimization. We also develop a distributed interface trap model to correlate different trapping dynamics with the interlayer property in each device. This work pushes forward the understanding and development of high endurance strategy for FeFET.
2021
Liang Z, Tang K, Dong J, Li Q, Zhou Y, Zhu R, Wu Y, Han D, HUANG R. A Novel High-Endurance FeFET Memory Device Based on ZrO2 Anti-Ferroelectric and IGZO Channel, in 2021 IEEE International Electron Devices Meeting (IEDM).; 2021:17.3.1-17.3.4.