Zhou Y, Shao H, Huang W, Zhu R, Zhang Y, HUANG R, Tang K. A Compact Writing Scheme for the Reliability Challenges in 1T Multi-level FeFET Array: Variation, Endurance and Write Disturb. IEEE Electron Device Letters. 2024:1-1.

Zhou Y, Huang W, Zhu R, HUANG R, Tang K. A Reliable 2 bit MLC FeFET with High Uniformity and 109 Endurance by Gate Stack and Write Pulse Co-optimization, in 2024 IEEE European Solid-State Electronics Research Conference (ESSERC).; 2024:657-660.

Zhu R, Zhou Y, Sun C, Huang W, Dong J, HUANG R, Tang K. Improved Memory Density and Endurance by a Novel 1T3C FeFET for BEOL Multi-level Cell Memory, in 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM).; 2024:1-3.

Zhou Y, HUANG R, Tang K. A Novel Hybrid-FE-layer FeFET with Enhanced Linearity for On-chip Training of CIM Accelerator, in 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM).; 2024:1-3.

Shao H, Fu B, Yang J, Luo W, Su C, Fu Z, Tang K, HUANG R. IMCE: An In-Memory Computing and Encrypting Hardware Architecture for Robust Edge Security, in 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE).; 2024:1-6.

Zhou Y, Liang Z, Zhu R, Huang Q, Tang K, HUANG R. HAO+Al2O3 FeFET Gate-Stack for Overall Improvement in Operating Voltage, Endurance, and Retention. IEEE Transactions on Electron Devices. 2024:1-7.

Zhou Y, Shao H, Zhu R, Luo W, Huang W, Shan L, HUANG R, Tang K. Hybrid-FE-Layer FeFET With High Linearity and Endurance Toward On-Chip CIM by Array Demonstration. IEEE Electron Device Letters. 2024;45:276-279.