摘要:

This article presents an incremental two-step capacitance-to-digital converter (CDC) with a time-domain ΔΣ modulator (TDΔΣM). Unlike the classic two-step CDCs, this work replaces the operational transconductance amplifier (OTA)-based active-RC integrator by a voltage-controlled oscillator (VCO)-based integrator, which is mostly digital and low-power. Featuring the infinite dc gain and intrinsic quantization in phase domain, this TDΔΣM enables a CDC design achieving 76-dB SNDR while requiring only a first-order loop, and a low oversampling ratio (OSR) of 15. Fabricated in 40-nm CMOS technology, the prototype CDC achieves a resolution of 0.29 fF while dissipating only 0.083 nJ/conversion, which improves the energy efficiency by over two times comparing to the similar performance designs.