This paper presents a millimeter-wave low-pass filter to investigate the RF performance of passive structures in a lab-level thin metal micro-nano processing technology. It consists of 3-stage periodic stepped-impedance cell to have a slow-wave structure to offer a high attenuation of stop band with a compact size. The total size of the chip is less than 1.1 mm 2 . It achieves an insertion loss of less than 2 dB at a frequency range from 0 to 110 GHz with a measured cut-off frequency around 40 GHz. A rejection of higher than 20 dB is measured in a stopband from 52 to 110 GHz, which is larger than 2 times of fundamental frequency. The measurement agrees well with the simulation results. It shows the potential of RF passives in a lab-level thinner metal thickness technology towards monolithic microwave integrated circuits.

Recently, hafnium oxide based ferroelectric memories gained great attention due to good scalability, high speed operation, and low power consumption. In contrast to the FRAM concept, the FeFET offers non-destructive read-out. However, the integration of the FeFET into an established CMOS technology entails several challenges. Herein, an 1T1C FeFET with separated transistor (1T) and ferroelectric capacitor (1C) is described and demonstrated. This alternative approach can be integrated into standard process technologies without introducing significant modifications of the front-end-of-line. All important steps starting from the integration of MFM devices into the BEoL through the fabrication and characterization of single 1T1C memory cells with various capacitor area ratios for bit cell tuning up to the initial demonstration of an 8 kbit test-array are covered.

In our work we describe and demonstrate an alternative approach of integrating 1T-1C FeFET having separated transistor (1T) without modifying frontend CMOS technology and an additional gate-coupled ferroelectric (FE) capacitor (1C) embedded in the interconnect layers. Starting from the results of FE capacitor integration and 1T-1C single cell characterization this paper describes realization and results of a fully integrated 8 kbit memory array implementation.

The following study employs RF waveform engineering to monitor degradation in 22nm FDSOI transistor at high-frequency region. The current and voltage waveforms are measured, reconstructed, and de-embedded to the device’s intrinsic during large-signal CW RF stress testing. This technique provides extra information on device performance compared with standard DC and RF figures of Merits degradation. With clear pictures of where on the output IV plane the degradation is occurring, device designers can get an insight into the degradation behavior limiting RF performance. It is observed that devices show a different behavior under RF stress in comparison to DC-stress-induced degradation.

This paper presents a highly linear 79 GHz differential low-noise amplifier (LNA) for civil-automotive radars operating at the predefined frequency range from 77 GHz to 81 GHz. The circuit is optimized for frequency-modulated continuous-wave (FMCW) radar application, which typically require a very high input-referred 1 dB-compression point (iP 1dB ). A reconfigurable differential common-source stage with capacitive neutralization is employed together with a common-gate stage in cascode configuration as the core of the LNA. The performance of the circuit can be easily adjusted within the gain-NF-P 1dB trade-off boundaries by changing the voltage at the back-gate terminal of the common-source stage, thus tailored to the application specific requirements. Passive baluns are placed at input and output to characterize the differential circuit with the available single-ended laboratory instrumentation. The LNA is implemented in a 22 nm FD-SOI CMOS technology. Its core is very compact with an area of 0.04 mm 2 . The fabricated chip is experimentally characterized in the lab, and it shows a peak gain of 8.7 dB at 80 GHz. From 75 GHz to 85 GHz, the measured input referred P 1dB (iP 1dB ) is about -6 dBm, and the minimum noise figure (NF) is 5 dB. Compared with the state-of-the-art for LNAs operating in a similar frequency range, the presented circuit shows the highest iP 1dB and has the most compact circuit core, together with an excellent NF and a moderate gain, resulting in the best figure-of-merit.

The following study discusses the impact of hot-carrier degradation on high frequency performance of the 22nm FDSOI n-channel transistors. A quasi-static small-signal equivalent circuit MOSFET model is used to describe the device behavior. RF characteristics are extracted after stressing device with continuous DC. DC characteristics are also investigated thoroughly before and after stress. It is observed that, the device suffers from both interface damage and oxide defect. Accordingly, this study addresses how severe hot-carrier degradation affects the intrinsic parameters as well as the device performance.

This paper presents the W-band noise performance of the 22nm FDSOI CMOS technology. In detail, the mm-wave thin-oxide MOSFETs is characterized comprehensively in term of device geometries using the tuner-based noise measurement approach. To aid the noise analysis and extraction, the following study adopts an accurate small-signal equivalent circuit model validated well with bias-dependence up to 110 GHz. The effects of back-gate bias to the overall noise performance are also addressed in this work. The test devices exhibit low noise figure in the full W-band 75-110 GHz. Besides, NF min of 2.8 dB and 3.6 dB is recorded at 94 GHz respectively for the n- and p-FETs with 18nm gate-length (N f = 32, W f = 1.0 µm). The result of this study indicates the comparable performance of the 22nm FDSOI technology to other candidates for W-band applications.

This paper presents a reflectometer with an integrated transducer as a high-integration miniaturized sensor for dielectric spectroscopy at 240 GHz in SiGe BiCMOS technology. The reflectometer consists of a signal generation component using 240-GHz multiplier chains, side-coupled directive couplers and a two-channel heterodyne receiver. Readout of the transducer upon exposure to liquids is performed by the measurement of its reflected signal using an external excitation source. The experimental dielectric sensing is demonstrated by using a binary methanol-ethanol mixture placed on the proposed on-chip dielectric sensor in the assembled printed circuit board.

This work gives an overview of integrated microwave to millimeter wave sensors and their applications covering frequencies from 28 GHz to 240 GHz. The designs are capable to address versatile application fields from liquid compound measurements to plaque detection and classification in arteries, glucose detection in continuous glucose monitoring (CGS) systems and virus detection in the context of respiratory diseases. The demonstrated approaches represent powerful and miniaturized solutions for highly sensitive contactless sensing of sample properties. Exploiting millimeter wave frequencies enables highest levels of integration to implement miniaturized sensing solutions including on-chip readout systems.

This paper presents a wideband integrated dielectric sensor with read-out circuit at 207-257 GHz in SiGe BiCMOS technology. The sensing element is equipped by a resonator that provides a bandpass frequency response which is varied in accordance to the carried permittivity change of the device under test. This variation can be sensed and recorded as the change of output voltage of an integrated 207-257 GHz 2 port vector network analyzer readout circuit. The demonstration of aforementioned readout system is verified by measuring the output of mixers as the reference, reflected and measured channel, and the uncalibrated S parameters of readout with different samples.

This paper presents a 60 GHz phase shifter, based on a coplanar waveguide (CPW) transmission line, loaded with ferroelectric hafnium zirconium oxide (HZO) variable metal-insulator-metal (MIM) varactors, developed for the back-end-of-line (BEoL) on-chip integration. Using the measured data of capacitance-voltage (C-V) characteristics of HZO and implementing the method-of-moments simulation, it was shown, that by changing the bias voltage between 0.95 and -3 V, the device shows a phase shift of 111° and a minimum insertion loss of -5.84 dB at 60 GHz. The chip area of the device is 0.206 mm 2 , making it the smallest among non-CMOS phase shifters.

This paper presents a tunable 60 GHz band-pass filter, based on a coplanar waveguide (CPW) transmission line, periodically loaded with ferroelectric Hafnium Zirconium Oxide (HZO) variable metal-ferroelectric-metal (MIM) capacitors (varactors), developed for back-end-of-line (BEoL) integration. Derived from the nonlinear capacitance of hafnium zirconium oxide and implementing the method-of-moments simulation, it was shown, that with changing the bias voltage between 0.95 and -3 V, the filter’s center frequency can be tuned between 60.5 and 69,7 GHz, respectively. Hereby, a minimum insertion loss of -3.3 dB is realized. The chip area of the filter is only 0.062 mm 2 , making it the smallest among tunable V-band filters.

This work presents a detailed study on the high-frequency performance of 22FDX ® FDSOI for 5G front-end power amplifiers. The following report focuses on the S-parameters and large-signal figure-of-merits such as output power, gain and power-added efficiency for an insightful and correct assessment on the device capability. DC characteristics of the test transistors are firstly investigated to determine the optimum operating point. Small-signal characterization is performed up to 110 GHz using a state-of-the-art mm-Wave measurement setup. An overall MSG/MAG of 16 ± 4 dB is recorded in the frequency range 10 - 80 GHz. On the other hand, large-signal performance on non-50 Ohm impedance environment is evaluated thoroughly through vector-receiver load-pull measurement up to 24 GHz. The measured output power and efficiency indicate that the DUTs perform well in the sub-6 GHz band and even in K-band. The outstanding experimental results emphasize the applicability and suitability of the 22FDX ® FDSOI technology platform for 5G low-power transmitters.

This paper investigates the applicability of a thick-oxide transistor from the 22FDX® for 5G NR sub-6 GHz front-end modules. Characterization and evaluation of the GlobalFoundries's FDSOI n-MOSFET regarding RF front-end figure-of-merits, such as output power, efficiency and linearity are discussed. Load-pull measurements are performed to extract the optimal performance. The test transistor delivers saturation power of +5.0 dBm and more than 65% of PAE while maintaining flat transducer gain of 10.2 ± 0.2 dB across the targeted frequency range for a 1.5 V single-ended class AB operation. Besides, the low PAE roll-off in term of reducing supply voltage and the particular 60% PAE at 10 dB output back-off indicate that the DUTs are well suitable for envelope tracking applications. Additional reliability tests at strong compression levels are conducted from which low performance degradation over time is observed even at 9 dB output compression.

In this paper, a comprehensive analysis on small-signal modeling of mm-wave transistor in 22nm FDSOI technology is presented. The model is constructed based on experimental S-parameters up to 110 GHz of a 22FDX® thick-oxide n-MOSFET and analytical parameter extraction approach. The non-quasi static effect is addressed thoroughly in the equivalent circuit model for high frequency validity. The bias-dependent series source and drain resistances are considered to account for the overlap regions between the gate and the highly doped source/drain regions. In addition, a simple RC network is included at the output to model the innegligible substrate coupling at mm-wave frequencies. Excellent agreements between model prediction and measurement are observed in the interested bandwidth for various bias conditions.

This paper for the first time prototypes and compares the homodyne and heterodyne terahertz dielectric sensors for lab-on-chip applications. The homodyne sensor consists of a multiplier chain, a balun-based power divider, an on-chip transducer, and IQ mixers. Differently, the heterodyne sensor requires an additional multiplier chain; however, it waives one mixer and a power divider, leading to reduced losses and alleviated power consumption. Fabricated using 0.13 µm SiGe BiCMOS technology, the homodyne and heterodyne sensors take 4 mm 2 and 5.2 mm 2 , and consume 400 mW and 499 mW, respectively. By experiments, both designed homodyne and heterodyne sensors can effectively sense the dielectric parameters of the samples. Moreover, the heterodyne sensor can address the DC offset issues with merely 99 mW additional power.

This paper presents two scalable resonator-based transducers (RBTs) at terahertz (THz) frequency range to realise THz spectroscopy for dielectric sensing. First, the design of 0.24 THz RBT is described by scaled a 0.12 THz sensing structures which utilises a wavelength-long closed-ring resonator to place inside of the Coplanar stripline (CPS) to make a high-selective bandpass response and combines with short-ended strips to create the bandstop behavior. Its scattering parameter can have a very large magnitude change and resonance frequency shift for the loaded samples. Next, a ring structure is also presented to implement 0.48 THz sensing by scaled a low frequency RBT, which employs ring resonator with an asymmetrically loaded stubs to perform a high analytic sensitivity and selectivity for loaded samples. Both presented scalable transducers, possessing the high integration capability of silicon circuits, are proved to be the promising employments in THz spectroscopy.

This paper presents a highly selective integrated dielectric sensor with read-out circuit at 240 GHz in SiGe BiCMOS and back-side etching technology. The sensor features with a resonator to perform bandpass frequency response which varied in accordance to the dielectric change of the sample under test. This variation can be sensed and recorded as the change of output voltage of an integrated 240 GHz IQ receiver. The demonstration of aforementioned function is verified by measuring the output of mixer when a sample is placed over the resonator.

This paper presents a 3-stage differential cascode power amplifier (PA) for 109–137 GHz applications. At 120 GHz the circuit delivers 16.5 dBm saturated output power with 12.8 % power-added efficiency (PAE) without using power combining techniques. The chip was fabricated in 130 nm SiGe BiCMOS technology offering heterojunction bipolar transistors (HBT) with f T /f max of 300/500 GHz. The PA consists of three stages optimized accordingly to the design goals. The first stage operates in class A to provide high gain while the two following stages are biased in class AB and deep class AB in order to increase the efficiency. The circuit draws a maximum current of 100 mA from 3.3 V and 4 V supplies. It occupies only 0.24 mm 2 chip area excluding baluns and bondpads, which makes it attractive for future power combiners. The presented amplifier is suitable for radar applications, that require a high dynamic range.

This paper presents an analysis for the impedance transformation ratio of microwave rectifier, implemented as an energy recycling unit suitable for RF outphasing transmitters. The experimental demonstration is realised by two single-ended microwave rectifiers with different impedance transformation ratios to separately replace the power-wasting resistive load of an isolating combiner in a multilevel LINC system. The measurement results show that the implemented rectifier can improve the overall efficiency of the multilevel LINC system from original 39.5 % to 46.7 % and 44.9 % respectively, without affecting linearity.