A balanced RF rectifier is proposed to replace terminations in microwave circuits and thus to recycle the otherwise dissipated power in resistances. In order not to degrade the performance of the original circuits, a balanced configuration is adopted because it minimizes the variation of input impedance of the rectification circuitry. This approach achieves good input reflection coefficient over a large dynamic range and operating frequencies. The highly efficient energy recycler is composed of a 3 dB quadrature coupler and two identical RF rectifiers. The impact of amplitude and phase imbalances of the transfer characteristics of the coupler is discussed. Furthermore, an arbitrary-port-resistance coupler is studied to replace non-50- Ω terminations. The experimental verification demonstrates that the proposed circuit provides an input reflection coefficient of better than −15 dB from 2.2 to 2.5GHz over different input power levels. The measured peak RF-to-dc efficiency is 74.9% at 2.34 GHz with S11=−24dB . The proposed balanced rectifier thus significantly improves S11 over existing rectifiers and is therefore suitable for replacing resistive terminations in a large variety of circuits.

This paper presents a highly selective integrated dielectric sensor with read-out circuit at 240 GHz in SiGe BiCMOS and back-side etching technology. The sensor features with a resonator to perform bandpass frequency response which varied in accordance to the dielectric change of the sample under test. This variation can be sensed and recorded as the change of output voltage of an integrated 240 GHz IQ receiver. The demonstration of aforementioned function is verified by measuring the output of mixer when a sample is placed over the resonator.

This paper presents a 3-stage differential cascode power amplifier (PA) for 109–137 GHz applications. At 120 GHz the circuit delivers 16.5 dBm saturated output power with 12.8 % power-added efficiency (PAE) without using power combining techniques. The chip was fabricated in 130 nm SiGe BiCMOS technology offering heterojunction bipolar transistors (HBT) with f T /f max of 300/500 GHz. The PA consists of three stages optimized accordingly to the design goals. The first stage operates in class A to provide high gain while the two following stages are biased in class AB and deep class AB in order to increase the efficiency. The circuit draws a maximum current of 100 mA from 3.3 V and 4 V supplies. It occupies only 0.24 mm 2 chip area excluding baluns and bondpads, which makes it attractive for future power combiners. The presented amplifier is suitable for radar applications, that require a high dynamic range.