Citation:
Ma, Yufei, Naveen Suda, Yu Cao, Jae-Sun Seo, and Sarma Vrudhula. “Scalable and modularized RTL compilation of Convolutional Neural Networks onto FPGA.” IEEE International Conference on Field Programmable Logic and Applications (FPL), 2016. Copy at http://www.tinyurl.com/233rkkdu