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Yufei Ma
/ 马宇飞
Assistant Professor
Institute for Artificial Intelligence
School of Integrated Circuits
Peking University
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Email:
yufei.ma@pku.edu.cn
No.5 Yiheyuan Road, Haidian District, Beijing 100871, P.R.China
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科研成果 by Year: 2017
2017
Ma, Yufei, Yu Cao, Sarma Vrudhula, and Jae-Sun Seo
. “
An Automatic RTL Compiler for High-Throughput FPGA Implementation of Diverse Deep Convolutional Neural Networks
.”
IEEE International Conference on Field Programmable Logic and Applications (FPL)
, 2017.
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Ma, Yufei, Minkyu Kim, Yu Cao, Sarma Vrudhula, and Jae-Sun Seo
. “
End-to-End Scalable FPGA Accelerator for Deep Residual Networks
.”
IEEE International Symposium on Circuits and Systems (ISCAS)
, 2017.
Links
Ma, Yufei, Yu Cao, Sarma Vrudhula, and Jae-Sun Seo
. “
Optimizing Loop Operation and Dataflow in FPGA Acceleration of Deep Convolutional Neural Networks
.”
ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA)
, 2017.
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Types
Conference Proceedings
(25)
期刊论文
(11)
Summary
2024
(8)
2023
(6)
2022
(3)
2020
(8)
2019
(2)
2018
(3)
2017
(3)
2016
(2)
2015
(1)
* Corresponding Author
# Co-First Author