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科研成果 by Year: 2024

2024
Chen, Zhiyuan, Yufei Ma*, Keyi Li, Yifan Jia, Guoxiang Li, Meng Wu, Tianyu Jia, Le Ye, and Ru HUANG. “An In-Memory Computing Accelerator with Reconfigurable Dataflow for Multi-Scale Vision Transformer with Hybrid Topology.” ACM/IEEE Design Automation Conference (DAC), 2024.
Qiu, Yikan, Yufei Ma*, Meng Wu, Yifan Jia, Xinyu Qu, Zecheng Zhou, Jincheng Lou, Tianyu Jia, Le Ye, and Ru HUANG. “Quartet: A 22nm 0.09mJ/lnference Digital Compute-in-Memory Versatile AI Accelerator with Heterogeneous Tensor Engines and Off-Chip-Less Dataflow.” IEEE Custom Integrated Circuits Conference (CICC), 2024. Links
Wu, Meng, Wenjie Ren, Peiyu Chen, Wentao Zhao, Yiqi Jing, Jiayoon Ru, Zhixuan Wang, et al.. “S2D-CIM: A 22nm 128Kb Systolic Digital Compute-in-Memory Macro with Domino Data Path for Flexible Vector Operation and 2-D Weight Update in Edge AI Applications.” IEEE Custom Integrated Circuits Conference (CICC), 2024. Links
Liu, Ying, Zhiyuan Chen, Wentao Zhao, Tianhao Zhao, Tianyu Jia, Zhixuan Wang*, Ru HUANG, Le Ye, and Yufei Ma*. “Sparsity-Aware In-Memory Neuromorphic Computing Unit With Configurable Topology of Hybrid Spiking and Artificial Neural Network.” IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I) (2024). Links
Ma#*, Yufei, Yikan Qiu#, Wentao Zhao, Guoxiang Li, Meng Wu, Tianyu Jia, Le Ye, and Ru HUANG. “DCIM-GCN: Digital Computing-in-Memory Accelerator for Graph Convolutional Network.” IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I) (2024). Links
Liu#, Ying, Yufei Ma#, Ninghui Shang, Tianhao Zhao, Peiyu Chen, Meng Wu, Jiayoon Ru, et al.. “A 22nm 0.26nW/Synapse Spike-Driven Spiking NeuralNetwork Processing Unit Using Time-Step-First Dataflowand Sparsity-Adaptive In-Memory Computing.” IEEE International Solid-State Circuits Conference (ISSCC 2024), 2024. Links