ALAMO: FPGA acceleration of deep learning algorithms with a modularized RTL compiler

Ma*, Yufei, Naveen Suda, Yu Cao, Sarma Vrudhula, and Jae-Sun Seo. “ALAMO: FPGA acceleration of deep learning algorithms with a modularized RTL compiler.” Integration, the VLSI Journal (2018). Copy at http://www.tinyurl.com/2ypq5tq4