Arvon: A heterogeneous SiP integrating a 14nm FPGA and two 22nm 1.8TFLOPS/W DSPs with 1.7Tbps/mm2 AIB 2.0 interface to provide versatile workload acceleration

Citation:

Tang* W, Cho* S-G, Hoang* TT, Botimer J, Zhu WQ, Chang C-C, Lu C-H, Zhu J, Tao Y, Wei T, et al. Arvon: A heterogeneous SiP integrating a 14nm FPGA and two 22nm 1.8TFLOPS/W DSPs with 1.7Tbps/mm2 AIB 2.0 interface to provide versatile workload acceleration, in 2023 Symposium on VLSI Circuits. IEEE; 2023:C7-1.