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陶耀宇
北京大学集成电路学院、人工智能研究院
燕园资源西楼2208B
taoyaoyutyy@pku.edu.cn
(email)
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科研成果 by Year: 2017
2017
Tao Y, Kwong J
.
LDPC post-processor architecture and method for low error floor conditions
. [Internet]. 2017.
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成果类型
Conference Paper
(14)
Miscellaneous
(1)
期刊论文
(5)
成果概览
2023
(5)
2022
(2)
2021
(2)
2020
(1)
2019
(4)
2017
(1)
2014
(2)
2013
(2)
2012
(1)
最新科研成果
eNODE: Energy-Efficient and Low-Latency Edge Inference and Training of Neural ODEs
Accelerating Neural-ODE Inference on FPGAs with Two-Stage Structured Pruning and History-Based Stepsize Search
Arvon: A heterogeneous SiP integrating a 14nm FPGA and two 22nm 1.8TFLOPS/W DSPs with 1.7Tbps/mm2 AIB 2.0 interface to provide versatile workload acceleration
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