Experimental and simulation I–V characteristics of the cap gate high electron mobility transistor (HEMT) are reported. The two-dimensional simulations results are in conformity with the realistic HEMT perfectly, indicating reliable and acceptable of the TCAD simulation method in GaN-based devices. Depending on this, further researches on the cap gate HEMT are carried out by TCAD software, which analyzes the impact of recessed depth of gate barrier, the dimension of LG and cap gate structure on GaN HEMT performances.
A novel E-mode AlGaN/GaN HEMT with double-doped p-gate (DDP) is proposed to improve output current and verified by TCAD simulation. The heavily p-doped region of the AlGaN gate layer ensures enhancement-mode (E-mode) operation and the lightly p-doped region of the AlGaN gate layer reduces the channel resistance. The simulated results have demonstrated that DDP HEMT delivers a much larger maximum drain current (IMAX = 334 mA/mm) than the conventional p-gate (CP) HEMT (IMAX = 144 mA/mm) while maintaining a high threshold voltage (VTH ~1.5 V). The simulated results also indicate that the DDP gate structure could decrease the peak electric field (EC) and thus improve the reliability of the device under off-state high-drain-bias (HDBT).
A new planar MISHEMT structure is proposed with the drain surrounded (D-S) by the gate channel. The gate channel serves as the stop-ring of the drain voltage, eliminating the damages from the high voltage on the mesa edge and isolation area. As a result, the leakage of the D-S MISHEMT is found to be reduced by almost 3 orders comparing with the source surrounded (S-S) MISHEMT. A saturated output current density of 740 mA/mm and an ON-resistance of 13.09 Ω-mm are obtained for device with LG/LGS/LGD/WC = 1.5/5/20/250 μm. Meanwhile, the degradation of dynamic ON-resistance and off-state breakdown performance are investigated in both D-S and S-S MISHEMT, which indicates excellent reliability of the D-S MISHEMT.
A novel early gate dielectric AlGaN/GaNmetal–insulator–semiconductorhigh-electron-mobilitytransistors (MIS-HEMTs) process is reported. With the highqualitySi3N4 dielectric by low-pressure chemical vapordeposition and damage free, self-terminating passivationlayer etching at the gate area, the MIS-HEMTs on 150-mmSi substrate demonstrate excellent output performanceand good uniformity. The interface trap density betweenthe gate insulator and the barrier layer is as low as2 × 1012 cm−2 · eV−1 extracted by the conductancemethod. The MIS-HEMT fabricated on the wafer delivers anextremely small gate leakage current of 10−9 mA/mm anda high Ion/Ioff ratio of 1011. The subthreshold swing (SS) isaround 80mV/dec, and the saturated output current densityis 750 mA/mm. The dynamic on-resistance increases about42% at a quiescent drain bias of 600 V. The Vth shift is−0.63 and −0.89 V at a high temperature of 200 °C andnegative gate-bias stress of −25 V, respectively, indicatinga comparable stability with the state-of-the-art MIS-HEMTs.An excellent threshold voltage and SS uniformity (1 − σ/μ)with the value of 94.5% and 95.2% are achieved on the150-mm wafer.
The compatibility of Au-free (Ti/Al/Ti/TiN)ohmic contacts in the gate-first double-metal (GFDM)process for AlGaN/GaN metal-insulator-semiconductorhigh-electron-mobility transistors (MIS-HEMTs) and Schottkybarrier diodes (SBDs) on the same 150-mm wafer wasinvestigated and discussed for the first time, including contactpre-treatments, Al diffusion in dielectric layers, and vias(contact windows between two metal layers) etching conditions.All of these steps are crucial to ohmic contacts as wellas overall AlGaN/GaN device fabrication process. With theoptimized ohmic contacts steps, not only an extremely lowohmic contact resistance (RC) value of 1.07 ·mm but alsoan excellent uniformity on the 150-mm wafer was obtained.The performance and uniformity of the MIS-HEMTs andSBDs based on the optimized GFDM process were alsodiscussed.
A further leakage reduction of AlGaN/GaN HEMTs with cap gate (CG-HEMTs) has been achieved by optimizing the gate structure and the gate etching process. The optimized CG-HEMTs single finger power HEMTs deliver IDSmax = 533 mA/mm at least with gate length of 0.5um and show a median gate leakage current of 20 nA/mm 25℃ measured at a drain voltage of 200 V. The breakdown voltage (BV) of CG-HEMTswas evaluated by the variation of drain-to-gate spacing (LDG) larger than 8 um. Furthermore, we show that the forward voltage of CG-HEMTs can be improved by shrinking the lateral dimension of the edge termination due to reduced series resistance.