This paper presents a millimeter-wave low-pass filter to investigate the RF performance of passive structures in a lab-level thin metal micro-nano processing technology. It consists of 3-stage periodic stepped-impedance cell to have a slow-wave structure to offer a high attenuation of stop band with a compact size. The total size of the chip is less than 1.1 mm 2 . It achieves an insertion loss of less than 2 dB at a frequency range from 0 to 110 GHz with a measured cut-off frequency around 40 GHz. A rejection of higher than 20 dB is measured in a stopband from 52 to 110 GHz, which is larger than 2 times of fundamental frequency. The measurement agrees well with the simulation results. It shows the potential of RF passives in a lab-level thinner metal thickness technology towards monolithic microwave integrated circuits.
Recently, hafnium oxide based ferroelectric memories gained great attention due to good scalability, high speed operation, and low power consumption. In contrast to the FRAM concept, the FeFET offers non-destructive read-out. However, the integration of the FeFET into an established CMOS technology entails several challenges. Herein, an 1T1C FeFET with separated transistor (1T) and ferroelectric capacitor (1C) is described and demonstrated. This alternative approach can be integrated into standard process technologies without introducing significant modifications of the front-end-of-line. All important steps starting from the integration of MFM devices into the BEoL through the fabrication and characterization of single 1T1C memory cells with various capacitor area ratios for bit cell tuning up to the initial demonstration of an 8 kbit test-array are covered.
