科研成果 by Type: Conference Proceedings

研究手稿
Lyu Y, Dai S, Wu P, Dai Q, Deng Y, Hu W, Dong Z, Xu J, Zhu S, Zhou X-H. A Semi-Synthetic Dataset Generation Framework for Causal Inference in Recommender Systems. [Internet]. 研究手稿. 访问链接Abstract
Accurate recommendation and reliable explanation are two key issues for modern recommender systems. However, most recommendation benchmarks only concern the prediction of user-item ratings while omitting the underlying causes behind the ratings. For example, the widely-used Yahoo!R3 dataset contains little information on the causes of the user-movie ratings. A solution could be to conduct surveys and require the users to provide such information. In practice, the user surveys can hardly avoid compliance issues and  sparse user responses, which greatly hinders the exploration of causality-based recommendation. To better support the studies of causal inference and further explanations in recommender systems, we  propose a novel semi-synthetic data generation framework for recommender systems where causal graphical models with missingness are employed to describe the causal mechanism of practical recommendation scenarios. To illustrate the use of our framework, we construct a semi-synthetic dataset with Causal Tags And Ratings (CTAR), based on the movies as well as their descriptive tags and rating information collected from a famous movie rating website. Using the collected data and the causal graph, the user-item-ratings and their corresponding user-item-tags are automatically generated, which provides the reasons (selected tags) why the user rates the items. Descriptive statistics and baseline results regarding the CTAR dataset are also reported. The proposed data generation framework is not limited to recommendation, and the released APIs can be used to generate customized datasets for other research tasks.
2025
Li W, Kuo J-C, Sheng M, Zhang P, Wu Q. Beyond Explicit and Implicit: How Users Provide Feedback to Shape Personalized Recommendation Content. The ACM CHI conference on Human Factors in Computing Systems (CHI '25). 2025.
2024
Liu# Y, Ma# Y, Shang N, Zhao T, Chen P, Wu M, Ru J, Jia T, Ye* L, Wang* Z, et al. A 22nm 0.26nW/Synapse Spike-Driven Spiking Neural Network Processing Unit Using Time-Step-First Dataflowand Sparsity-Adaptive In-Memory Computing. IEEE International Solid-State Circuits Conference (ISSCC 2024) [Internet]. 2024. Links
Xu B, Shuo F, Wei Y. Anticipating object shapes using world knowledge and classifier information: Evidence from eve-movements in L1 and L2 processing. The Proceedings of the 46th Annual Meeting of the Cognitive Science Society [Internet]. 2024:2861–2869. Full textAbstract
This study explores how L1 and L2 Chinese speakers use world knowledge and classifier information to predict fine-grained referent features. In a visual-world-paradigm eye-tracking experiment, participants were presented with two visual objects that were denoted by the same noun in Chinese but matched different shape classifiers. Meanwhile, they heard sentences containing world knowledge triggering context and classifiers. The effect of world knowledge has been differentiated from word-level associations. Native speakers generated anticipations about the shape/state features of the referents at an early processing stage and quickly integrated linguistic information with world knowledge upon hearing the classifiers. In contrast, L2 speakers show delayed, reduced anticipation based on world knowledge and minimal use of classifier cues. The findings reveal different cue-weighting strategies in L1 and L2 processing. Specifically, L2 speakers whose first languages lack obligatory classifiers do not employ classifier cues in a timely manner, even though the semantic meanings of shape classifiers are accessible to them. No evidence supports over-reliance on world knowledge in L2 processing. This study contributes to the understanding of L2 real-time processing, particularly in L2 speakers’ utility of linguistic and non-linguistic information in anticipating fine-grained referent features.
Xu W, Luo J, Huang Q, HUANG R. Compact and Efficient CAM Architecture through Combinatorial Encoding and Self-Terminating Searching for In-Memory-Searching Accelerator. Proceedings of the 61st ACM/IEEE Design Automation Conference. 2024:1-6.
Xu W, Luo J, Huang Q, HUANG R. Compact and Efficient CAM Architecture through Combinatorial Encoding and Self-Terminating Searching for In-Memory-Searching Accelerator. Proceedings of the 61st ACM/IEEE Design Automation Conference. 2024:1-6.
Luo J, Song B, Lin Y, Fu Z, Fu B, Xu W, Shen L, Wang Y, Huang Q, HUANG R. Experimental Demonstration of Resonant Adiabatic Writing and Computing in Ferroelectric Capacitive Memory Array for Energy-Efficient Edge AI. 2024 IEEE International Electron Devices Meeting (IEDM). 2024:1-4.
Luo J, Song B, Lin Y, Fu Z, Fu B, Xu W, Shen L, Wang Y, Huang Q, HUANG R. Experimental Demonstration of Resonant Adiabatic Writing and Computing in Ferroelectric Capacitive Memory Array for Energy-Efficient Edge AI. 2024 IEEE International Electron Devices Meeting (IEDM). 2024:1-4.
Dong Y, Liu X, Bai K, Li G, Wu M, Jing Y, Zhang Y, Zhan P, Zhang Y, Ma Y, et al. A Heterogeneous TinyML SoC with Energy-Event-Performance-Aware Management and Compute-in-Memory Two-Stage Event-Driven Wakeup. IEEE Symposium on VLSI Technology and Circuits (VLSI-C) [Internet]. 2024. Links
Sheng M, Zhang P. “How I Form and Escape Information Cocoons”: An Interview Study of Users on Short Video Apps. International Conference on Information. 2024:129-138.
Chen Z, Ma* Y, Li K, Jia Y, Li G, Wu M, Jia T, Ye L, HUANG R. An In-Memory Computing Accelerator with Reconfigurable Dataflow for Multi-Scale Vision Transformer with Hybrid Topology. ACM/IEEE Design Automation Conference (DAC) [Internet]. 2024. Links
Xu W, Luo J, Fu Z, Wang K, Huang Q, HUANG R. A Novel Complementary Ferroelectric FET based Compressed Multibit Content Addressable Memory with High Area-and Energy-Efficiency. 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM). 2024:1-3.
Xu W, Luo J, Fu Z, Wang K, Huang Q, HUANG R. A Novel Complementary Ferroelectric FET based Compressed Multibit Content Addressable Memory with High Area-and Energy-Efficiency. 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM). 2024:1-3.
Xu W, Luo J, Fu B, Chen Z, Fu Z, Wang K, Huang Q, HUANG R. A Novel Ferroelectric FET based Multibit Content Addressable Memory with Dynamic and Static Modes for Energy-Efficient Training and Inference. 2024 IEEE European Solid-State Electronics Research Conference (ESSERC). 2024:404-407.
Xu W, Luo J, Fu B, Chen Z, Fu Z, Wang K, Huang Q, HUANG R. A Novel Ferroelectric FET based Multibit Content Addressable Memory with Dynamic and Static Modes for Energy-Efficient Training and Inference. 2024 IEEE European Solid-State Electronics Research Conference (ESSERC). 2024:404-407.
Xu W, Luo J, Fu Z, Han R, Bao S, Wang K, Huang Q, HUANG R. Novel Ferroelectric-Based Ising Machine Featuring Reconfigurable Arbitrary Ising Graph and Controllable Annealing Through Device-Algorithm Co-Optimization. 2024 IEEE International Electron Devices Meeting (IEDM). 2024:1-4.
Xu W, Luo J, Fu Z, Han R, Bao S, Wang K, Huang Q, HUANG R. Novel Ferroelectric-Based Ising Machine Featuring Reconfigurable Arbitrary Ising Graph and Controllable Annealing Through Device-Algorithm Co-Optimization. 2024 IEEE International Electron Devices Meeting (IEDM). 2024:1-4.
Xu W, Luo J, Fu B, Fu Z, Wang K, Su C, Huang Q, HUANG R. A Novel Small-Signal Ferroelectric Memcapacitor based Capacitive Computing-In-Memory for Area-and Energy-Efficient Quantized Neural Networks. 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM). 2024:1-3.
Xu W, Luo J, Fu B, Fu Z, Wang K, Su C, Huang Q, HUANG R. A Novel Small-Signal Ferroelectric Memcapacitor based Capacitive Computing-In-Memory for Area-and Energy-Efficient Quantized Neural Networks. 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM). 2024:1-3.
Xu S, Luo T, Luo J, HUANG R, Huang Q. A Novel Ternary Transistor with Nested Source Design Incorporating Hybrid Switching Mechanism for Low-Power and High-Performance Applications. 2024 IEEE Silicon Nanoelectronics Workshop (SNW). 2024:69-70.

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