科研成果 by Type: Conference Proceedings

研究手稿
Lyu Y, Dai S, Wu P, Dai Q, Deng Y, Hu W, Dong Z, Xu J, Zhu S, Zhou X-H. A Semi-Synthetic Dataset Generation Framework for Causal Inference in Recommender Systems. [Internet]. 研究手稿. 访问链接Abstract
Accurate recommendation and reliable explanation are two key issues for modern recommender systems. However, most recommendation benchmarks only concern the prediction of user-item ratings while omitting the underlying causes behind the ratings. For example, the widely-used Yahoo!R3 dataset contains little information on the causes of the user-movie ratings. A solution could be to conduct surveys and require the users to provide such information. In practice, the user surveys can hardly avoid compliance issues and  sparse user responses, which greatly hinders the exploration of causality-based recommendation. To better support the studies of causal inference and further explanations in recommender systems, we  propose a novel semi-synthetic data generation framework for recommender systems where causal graphical models with missingness are employed to describe the causal mechanism of practical recommendation scenarios. To illustrate the use of our framework, we construct a semi-synthetic dataset with Causal Tags And Ratings (CTAR), based on the movies as well as their descriptive tags and rating information collected from a famous movie rating website. Using the collected data and the causal graph, the user-item-ratings and their corresponding user-item-tags are automatically generated, which provides the reasons (selected tags) why the user rates the items. Descriptive statistics and baseline results regarding the CTAR dataset are also reported. The proposed data generation framework is not limited to recommendation, and the released APIs can be used to generate customized datasets for other research tasks.
2024
Liu# Y, Ma# Y, Shang N, Zhao T, Chen P, Wu M, Ru J, Jia T, Ye* L, Wang* Z, et al. A 22nm 0.26nW/Synapse Spike-Driven Spiking Neural Network Processing Unit Using Time-Step-First Dataflowand Sparsity-Adaptive In-Memory Computing. IEEE International Solid-State Circuits Conference (ISSCC 2024) [Internet]. 2024. Links
Jing Y, Wu M, Zhou J, Sun Y, Ma Y, HUANG R, Ye* L, Jia* T. AIG-CIM: A Scalable Chiplet Module with Tri-Gear Heterogeneous Compute-in-Memory for Diffusion Acceleration. ACM/IEEE Design Automation Conference (DAC) [Internet]. 2024. Links
Xu B, Shuo F, Wei Y. Anticipating object shapes using world knowledge and classifier information: Evidence from eve-movements in L1 and L2 processing. The Proceedings of the 46th Annual Meeting of the Cognitive Science Society [Internet]. 2024:2861–2869. Full textAbstract
This study explores how L1 and L2 Chinese speakers use world knowledge and classifier information to predict fine-grained referent features. In a visual-world-paradigm eye-tracking experiment, participants were presented with two visual objects that were denoted by the same noun in Chinese but matched different shape classifiers. Meanwhile, they heard sentences containing world knowledge triggering context and classifiers. The effect of world knowledge has been differentiated from word-level associations. Native speakers generated anticipations about the shape/state features of the referents at an early processing stage and quickly integrated linguistic information with world knowledge upon hearing the classifiers. In contrast, L2 speakers show delayed, reduced anticipation based on world knowledge and minimal use of classifier cues. The findings reveal different cue-weighting strategies in L1 and L2 processing. Specifically, L2 speakers whose first languages lack obligatory classifiers do not employ classifier cues in a timely manner, even though the semantic meanings of shape classifiers are accessible to them. No evidence supports over-reliance on world knowledge in L2 processing. This study contributes to the understanding of L2 real-time processing, particularly in L2 speakers’ utility of linguistic and non-linguistic information in anticipating fine-grained referent features.
Dong Y, Liu X, Bai K, Li G, Wu M, Jing Y, Zhang Y, Zhan P, Zhang Y, Ma Y, et al. A Heterogeneous TinyML SoC with Energy-Event-Performance-Aware Management and Compute-in-Memory Two-Stage Event-Driven Wakeup. IEEE Symposium on VLSI Technology and Circuits (VLSI-C) [Internet]. 2024. Links
Sheng M, Zhang P. “How I Form and Escape Information Cocoons”: An Interview Study of Users on Short Video Apps. International Conference on Information. 2024:129-138.
Chen Z, Ma* Y, Li K, Jia Y, Li G, Wu M, Jia T, Ye L, HUANG R. An In-Memory Computing Accelerator with Reconfigurable Dataflow for Multi-Scale Vision Transformer with Hybrid Topology. ACM/IEEE Design Automation Conference (DAC) [Internet]. 2024. Links
Qiu Y, Ma* Y, Wu M, Jia Y, Qu X, Zhou Z, Lou J, Jia T, Ye L, HUANG R. Quartet: A 22nm 0.09mJ/lnference Digital Compute-in-Memory Versatile AI Accelerator with Heterogeneous Tensor Engines and Off-Chip-Less Dataflow. IEEE Custom Integrated Circuits Conference (CICC) [Internet]. 2024. Links
Wu M, Ren W, Chen P, Zhao W, Jing Y, Ru J, Wang Z, Ma Y, HUANG R, Jia* T, et al. S2D-CIM: A 22nm 128Kb Systolic Digital Compute-in-Memory Macro with Domino Data Path for Flexible Vector Operation and 2-D Weight Update in Edge AI Applications. IEEE Custom Integrated Circuits Conference (CICC) [Internet]. 2024. Links
2023
Liu Y, Chen Z, Wang Z, Zhao W, He W, Zhu J, Wang Q, Zhang N, Jia T, Ma* Y, et al. A 22nm 0.43pJ/SOP Sparsity-Aware In-Memory Neuromorphic Computing System with Hybrid Spiking and Artificial Neural Network and Configurable Topology. IEEE Custom Integrated Circuits Conference (CICC) [Internet]. 2023. Links
Chen# P, Wu# M, ..., Ma* Y, Ye* L, HUANG R. A 22-nm Delta-Sigma Computing-In-Memory (ΔΣCIM) SRAM Macro with Near-Zero-Mean Outputs and LSB-First ADCs Achieving 21.38TOPS/W for 8b-MAC Edge AI Processing. IEEE International Solid-State Circuits Conference (ISSCC 2023) [Internet]. 2023. Links
Lee S, Li W, Zhang P, Wang J. Characterizing Data Practices in Research Papers Across Four Disciplines. International Conference on Information. 2023:359-368.
Ma Y, An X, Wu Z, Liu P, Lu C. Customer Mistreatment and Employees’ Coping Strategies: A Meta-SEM Analysis. The 83rd Annual Meeting of the Academy of Management. 2023.
Jing Y, Sun Y, Wang X, Zhao W, Wu M, Yan F, Ma Y, Ye L, Jia T. DCIM-3DRec: A 3D Reconstruction Accelerator with Digital Computing-in-Memory and Octree-Based Scheduler. IEEE/ACM Int. Symp. on Low Power Electronics and Design (ISLPED) [Internet]. 2023. Links
Sheng M, Wang J, Zhu X, Zhang P. An Exploratory Study of Intergenerational Technical Help from the Youth’s Perspective. International Conference on Information. 2023:417-425.
Li W, Zhang P, Jun W. Humanities Scholars' Understanding of Data and the Implications for Humanities Data Curation. Proceedings of the Association for Information Science and Technology. 2023;60:1034-1036.
Pan Z, Trusler MJP, Zhang K. Interfacial Dilational Rheology Between Nitrogen and Aqueous Surfactant Solutions: Implications for Foam-Assisted EOR. SPE Annual Technical Conference and Exhibition [Internet]. 2023;Day 2 Tue, October 17, 2023. 访问链接
Dong Y, Jia* T, .., Ma Y, Liang Y, Ye* L, HUANG R. A Model-Specific End-to-End Design Methodology for Resource-Constrained TinyML Hardware. ACM/IEEE Design Automation Conference (DAC) [Internet]. 2023. Links
On-Chip CPW Low-Pass Filter with 50–110 GHz Bandstop in 400 nm Metal Thickness Technology Towards Lab-Level Ka-Band MMICs
Zhuo M, Wu J, Qiu H, Li H, Ding L, Wang D. On-Chip CPW Low-Pass Filter with 50–110 GHz Bandstop in 400 nm Metal Thickness Technology Towards Lab-Level Ka-Band MMICs. 2023 IEEE MTT-S International Wireless Symposium (IWS) [Internet]. 2023:1-3. 访问链接Abstract
This paper presents a millimeter-wave low-pass filter to investigate the RF performance of passive structures in a lab-level thin metal micro-nano processing technology. It consists of 3-stage periodic stepped-impedance cell to have a slow-wave structure to offer a high attenuation of stop band with a compact size. The total size of the chip is less than 1.1 mm 2 . It achieves an insertion loss of less than 2 dB at a frequency range from 0 to 110 GHz with a measured cut-off frequency around 40 GHz. A rejection of higher than 20 dB is measured in a stopband from 52 to 110 GHz, which is larger than 2 times of fundamental frequency. The measurement agrees well with the simulation results. It shows the potential of RF passives in a lab-level thinner metal thickness technology towards monolithic microwave integrated circuits.
Chen P, Wu M, Ma* Y, Ye* L, HUANG R. RIMAC: An Array-level ADC/DAC-free ReRAM-based In-MemoryDNN Processor with Analog Cache and Computation. Asia and South Pacific Design Automation Conference (ASP-DAC) [Internet]. 2023. Links

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