NEWS

Two papers are accepted by VLSI 2024.

四月 4, 2024
Congratulations to Yanchi. A heterogeneous TinyML SoC with centralized low power management will be presented.
A hierarchical power management solution for 12nm SoC will also be introduced (work done at Harvard).

Three papers are accepted by DAC 2024.

二月 20, 2024

Congratulations to Yiqi and Mingxuan (senior-year undergrad). A CIM-based chiplet design for Diffusion and sparsity-aware training accelerator are introduced.

A MHA ViT accelerator paper will also be presented (collaborated with Prof. Yufei Ma).

Two co-authored papers are accepted by CICC 2024.

一月 8, 2024

One paper introduces a flexible systolic CIM macro (collaborated with Prof. Le Ye), and the other paper shows a heterogeneous CIM-based processor (collaborated with Prof. Yufei Ma).

Two papers are accepted by ISSCC 2024.

十月 20, 2023

One 12nm agile-designed SoC is designed with decentralized power management (work done at Harvard), and a 22nm 0.26nW/synapse SNN accelerator will be presented (collaborated with Prof. Le Ye).