(* Corresponding author; # Equal contribution author)
Year 2024
[1] J. Wei, Z. Zheng, G. Tang, H. Xu, G. Lyu, L. Zhang, J. Chen, M. Hua, S. Feng, T. Chen, and K. J. Chen, "GaN power integration technology and its future prospects," IEEE Trans. Electron Devices, vol. 71, no. 3, pp. 1365-1382, Mar. 2024, doi: 10.1109/TED.2023.3341053.
[2] J. Yang, J. Wei*, Y. Wu, J. Yu, J. Cui, X. Yang, X. Liu, J. Wang, Y. Hao, M. Wang, and B. Shen*, “Enhanced robustness against hot-electron-induced degradation in active-passivation p-GaN gate HEMT,” Appl. Phys. Lett., vol. 124, no. 10, p. 103505, Mar. 2024, doi: 10.1063/5.0186902. (Cover-page Article)
[3] J. Cui, M. Wang, Y. Wu, J. Yang, H. Yang, J. Yu, T. Li, X. Yang, X. Liu, K. Cheng, J. Wang, B. Shen, and J. Wei*, “Demonstration of 1200-V E-mode GaN-on-sapphire power transistor with low dynamic ON-resistance based on active passivation technique,” IEEE Electron Device Lett., vol. 45, no. 2, pp. 220-223, Feb. 2024, doi: 10.1109/LED.2023.3341413. (Editor’s pick)
[4] J. Cui, Y. Wu, J. Yang, J. Yu, T. Li, X. Liu, K. Cheng, X. Yang, Y. Hao, J. Wang, B. Shen, M. Wang, and J. Wei*, “High-voltage E-mode p-GaN gate HEMT on sapphire with gate termination extension,” IEEE Trans. Electron Devices, vol. 71, no. 3, pp. 1592-1597, Mar. 2024, doi: 10.1109/TED.2024.3359174.
[5] T. Li, M. Zhang*, J. Yu, J. Cui, J. Yang, Y. Wu, H. Yang, Y. Zhang, X. Yang, M. Wang, S. Feng, B. Shen, and J. Wei*, “Development of enhancement-mode GaN p-FET with post-etch wet treatment on p-GaN gate HEMT epi-wafer,” IEEE Trans. Electron Devices, vol. 71, no. 4, pp. 2361-2366, Apr. 2024, doi: 10.1109/TED.2024.3365676.
[6] C. Wang, J. Wang*, X. Wang, Z. Liu, J. He, J. Gao, C. Ao, M. Wang, and J. Wei*, "Hybrid p-GaN/MIS gate HEMT suppressing drain-induced dynamic threshold voltage instability," IEEE Electron Device Lett., vol. 45, no. 10, pp. 1732-1735, Oct. 2024, doi: 10.1109/LED.2024.3448362.
[7] J. Song, M. Wang*, J. Wei*, Z. Fan, J. Zhang, H. Yang, P. Wang, B. Xie, C. Li, L. Yuan, and B. Shen*, "Effect of source electrostatic interaction on the off-state leakage current of p-GaN gate HEMTs," IEEE Electron Device Lett., vol. 45, no. 10, pp. 1728-1731, Oct. 2024, doi: 10.1109/LED.2024.3447236.
[8] J. Yang, J. Wei*, M. Wang, J. Yu, Y. Wu, J. Cui, T. Li, X. Yang, J. Wang, and B. Shen*, "Insulated p-GaN gate active-passivation HEMT maintaining effective hole injection for low dynamic ON-resistance," IEEE Electron Device Lett., vol. 45, no. 6, pp. 980-983, Jun. 2024, doi: 10.1109/LED.2024.3390770.
[9] J. Cui, J. Yang, J. Yu, T. Li, H. Yang, X. Liu, J. Wang, M. Wang, B. Shen, and J. Wei*, "GaN-on-sapphire JTE-anode lateral field-effect rectifier for improved breakdown voltage (>2.5 kV) and dynamic RON," Appl. Phys. Lett., vol. 125, no. 17, p. 173503, Oct. 2024, doi: 10.1063/5.0232619.
[10] J. Yang, M. Wang, J. Yu, Y. Wu, J. Cui, T. Li, H. Yang, J. Wang, X. Liu, X. Yang, B. Shen, and J. Wei*, "Virtual-body p-GaN gate HEMT with enhanced ruggedness against hot-electron-induced degradation," IEEE Electron Device Lett., vol. 45, no. 5, pp. 770-773, May 2024, doi: 10.1109/LED.2024.3375942.
[11] Y. Wu, J. Yang, J. Yu, H. Chang, X. Yang, J. Wang, Y. Hao, B. Shen, D. Zhou, M. Wang, and J. Wei*, "Analysis of on-resistance in 650-V enhancement-mode active-passivation p-GaN gate HEMT," ECS J. Solid State Sci. Technol., vol. 13, no. 11, p. 115002, Nov. 2024, doi: 10.1149/2162-8777/ad905b.
[12] Y. Wu, M. Nuo, J. Yang, W. Lin, X. Liu, X. Yang, J. Wang, Y. Hao, B. Shen, M. Wang, and J. Wei*, “Suppression of buffer trapping effect in GaN-on-Si active-passivation p-GaN gate HEMT via light/hole pumping,” IEEE Trans. Electron Devices, vol. 71, no. 1, pp. 484-489, Jan. 2024, doi: 10.1109/TED.2023.3336302.
[13] Z. Fan, M. Wang*, J. Wei*, M. Nuo, J. Zhou, J. Zhang, Y. Hao, and B. Shen*, “Analysis of drain-dependent threshold voltage and false turn-on of Schottky-type p-GaN gate HEMT in bridge-leg circuit,” IEEE Trans. Power Electron., vol. 39, no. 2, pp. 2351-2359, Feb. 2024, doi: 10.1109/TPEL.2023.3329053.
[14] L. Sang, R. Jin, J. Cui, X. Niu, Z. Li, J. Yang, M. Nuo, M. Zhang, M. Wang, and J. Wei, "SiC fin-channel MOSFET for enhanced gate shielding effect," Electronics, vol. 13, no. 9, p. 1701, May 2024, doi: 10.3390/electronics13091701.
[15] X. Wang, J. Wang, B. Zhang, C. Wang, Z. Liu, J. He, J. Gao, H. Wang, J. Wei, and M. Wang, "Dynamic extension behavior of the depletion region in GaN HEMTs monitored with a channel-probe branch structure," IEEE Electron Device Lett., vol. 45, no. 12, pp. 2295-2298, Dec. 2024, doi: 10.1109/LED.2024.3485639.
Year 2023
[16] X. Liu, M. Wang*, J. Wei*, Y. Hao, X. Fu, X. Yang, and B. Shen*, “Quasi-vertical GaN-on-silicon Schottky barrier diode terminated with hydrogen modulated in-situ pn junction,” IEEE J. Electron Devices Soc., vol. 11, pp. 485-489, 2023, doi: 10.1109/JEDS.2023.3309972.
[17] G. Lyu, J. Sun, J. Wei*, and K. J. Chen*, “Static and dynamic characteristics of a 1200-V/25-mΩ normally-off SiC/GaN cascode device built with parallel-connected SiC JFETs controlled by a single GaN HEMT,” IEEE Trans. Power Electron., vol. 38, no. 10, pp. 12648-12658, Oct. 2023, doi: 10.1109/TPEL.2023.3294801.
[18] J. Yu, J. Wei*, M. Wang*, J. Yang, Y. Wu, J. Cui, T. Li, J. Wang, and B. Shen, “650-V E-mode p-GaN gate HEMT with Schottky source extension towards enhanced short-circuit reliability,” IEEE Electron Device Lett., vol. 44, no. 10, pp. 1700-1703, Oct. 2023, doi: 10.1109/LED.2023.3310527.
[19] J. Yang, J. Wei*, M. Wang*, Y. Wu, M. Nuo, Y. Hao, and B. Shen, “TCAD study on suppression of substrate induced degradation in GaN-on-Si integrated half-bridge circuit by local Si lateral etch,” IEEE Trans. Electron Devices, vol. 70, no. 11, pp. 5584-5589, Nov. 2023, doi: 10.1109/TED.2023.3311411.
[20] J. Yang, J. Wei*, Y. Wu, M. Nuo, Z. Chen, X. Yang, M. Wang, and B. Shen, “600-V p-GaN gate HEMT with buried hole spreading channel demonstrating immunity against buffer trapping effects,” IEEE Electron Device Lett., vol. 44, no. 2, pp. 225-228, Feb. 2023, doi: 10.1109/LED.2022.3232474.
[21] Y. Wu, J. Wei*, M. Wang*, M. Nuo, J. Yang, W. Lin, Z. Zheng, L. Zhang, M. Hua, X. Yang, Y. Hao, K. J. Chen, and B. Shen, “An actively-passivated p-GaN Gate HEMT with screening effect against surface traps,” IEEE Electron Device Lett., vol. 44, no. 1, pp. 25-28, Jan. 2023, doi: 10.1109/LED.2022.3222170.
[22] M. Nuo, Y. Wu, J. Yang, Y. Hao, M. Wang*, and J. Wei*, “Time-resolved extraction of negatively shifted threshold voltage in Schottky-type p-GaN gate HEMT biased at high VDS,” IEEE Trans. Electron Devices, vol. 70, no. 7, pp. 3462-3467, Jul. 2023, doi: 10.1109/TED.2023.3276731.
[23] Y. Yin#, J. Yang#, M. Zhang, T. Gao, M. Wang*, and J. Wei*, “Unipolar-turn-off lateral insulated-gate bipolar transistor with on-chip biasing circuit for injection control,” IEEE Trans. Electron Devices, vol. 70, no. 9, pp. 4737-4742, Sep. 2023, doi: 10.1109/TED.2023.3294359.
[24] 徐嘉悦, 王茂俊*, 魏进*, 解冰, 郝一龙, 沈波, “GaN垂直结构器件结终端设计,” 电子与封装, vol. 23, no. 01, p. 010105, Jan. 2023, doi: 10.16257/j.cnki.1681-1070.2023.0034.
[25] S. Liu, M. Huang, M. Wang, M. Zhang, and J. Wei*, “Considerations for SiC super junction MOSFET: On-resistance, gate structure, and oxide shield,” Microelectron. J., vol. 137, p. 105823, Jul. 2023, doi: 10.1016/j.mejo.2023.105823.
[26] M. Zhang, Y. Zhang*, B. Li*, S. Feng, M. Hua, X. Tang, J. Wei*, and K. J. Chen, “Cell design consideration in SiC planar IGBT and proposal of new SiC IGBT with improved performance trade-off,” IEEE J. Electron Devices Soc., vol. 11, pp. 198-203, Apr. 2023, doi: 10.1109/JEDS.2023.3259639.
[27] J. Xu, X. Liu, B. Xie, Y. Hao, C. P. Wen, J. Wei*, and M. Wang*, “Correlation between reverse leakage current and electric field spreading in GaN vertical SBD with high-energy ion implanted guard rings,” IEEE Trans. Electron Devices, vol. 70, no. 4, pp. 1745-1750, Apr. 2023, doi: 10.1109/TED.2023.3241260.
[28] X. Liu, M. Wang*, J. Wei*, C. P. Wen, B. Xie, Y. Hao, X. Yang, and B. Shen, “GaN-on-Si quasi-vertical p-n diode with junction termination extension based on hydrogen plasma treatment and diffusion,” IEEE Trans. Electron Devices, vol. 70, no. 4, pp. 1636-1640, Apr. 2023, doi: 10.1109/TED.2023.3247366.
Year 2022
[29] M. Nuo, J. Wei*, M. Wang, J. Yang, Y. Wu, Y. Hao, and B. Shen, “Gate/drain coupled barrier lowering effect and negative threshold voltage shift in Schottky-type p-GaN gate HEMT,” IEEE Trans. Electron Devices, vol. 69, no. 7, pp. 3630-3635, Jul. 2022, doi: 10.1109/TED.2022.3175792.
[30] J. Yang, M. Zhang*, Y. Wu, M. Wang, and J. Wei*, “Double-gate RESURF lateral insulated gate bipolar transistor with built-in p-channel MOSFET for active conductivity modulation control throughout drift region,” IEEE Electron Device Lett., vol. 43, no. 2, pp. 272-275, Feb. 2022, doi: 10.1109/LED.2022.3140221.
[31] G. Lyu, J. Wei*, W. Song, Z. Zheng, L. Zhang, J. Zhang, S. Feng, and K. J. Chen*, “GaN on engineered bulk Si (GaN-on-EBUS) substrate for monolithic integration of high-/low-side switches in bridge circuits,” IEEE Trans. Electron Devices, vol. 69, no. 8, pp. 4262-4169, Aug. 2022, doi: 10.1109/TED.2022.3178361.
[32] H. Wang, Y. Lin, J. Jiang, D. Dong, F. Ji, M. Zhang, M. Jiang, W. Gan, H. Li, M. Wang, J. Wei*, B. Li*, X. Tang*, C. Hu, and W. Cao, “Investigation of thermally induced threshold voltage shift in normally-OFF p-GaN gate HEMTs,” IEEE Trans. Electron Devices, vol. 5, no. 69, pp. 2287-2292, May 2022, doi: 10.1109/TED.2022.3157805.
[33] J. Wei#*, L. Zhang#*, Z. Zheng, W. Song, S. Yang, and K. J. Chen*, “ON-resistance analysis of GaN reverse-conducting HEMT with distributive built-in SBD,” IEEE Trans. Electron Devices, vol. 69, no. 2, pp. 644-649, Feb. 2022, doi: 10.1109/TED.2021.3133847.
[34] K. Zhong, J. Wei, J. He, S. Feng, Y. Wang, S. Yang, and K. J. Chen, “IG- and VGS-dependent dynamic RON characterization of commercial high-voltage p-GaN gate power HEMTs,” IEEE Trans. Ind. Electron., vol. 69, no. 8, pp. 8387-8395, Aug. 2022, doi: 10.1109/TIE.2021.3104592.
[35] G. Lyu, J. Wei, T. Chen, J. Zhang, and K. J. Chen, “Substrate and trench design for GaN-on-EBUS power IC platform,” IEEE Trans. Electron Devices, vol. 69, no. 7, pp. 3641-3647, Jul. 2022, doi: 10.1109/TED.2022.3176831.
[36] K. Zhong, Y. Wang, G. Lyu, J. Wei, J. Sun, and K. J. Chen, “650-V normally-OFF GaN/SiC cascode device for power switching applications,” IEEE Trans. Ind. Electron., vol. 69, no. 9, pp. 8997-9006, Sep. 2022, doi: 10.1109/TIE.2021.3114697.
[37] H. Xu, G. Tang, J. Wei, Z. Zheng, and K. J. Chen, “Monolithic integration of gate driver and protection modules with p-GaN gate power HEMTs,” IEEE Trans. Ind. Electron., vol. 69, no. 7, pp. 6784-6793, Jul. 2022, doi: 10.1109/TIE.2021.3102387.
[38] L. Tang, H. Jiang, J. Wei, Q. Hu, X. Zhong, and X. Qi, “A comparative study of SiC MOSFETs with and without integrated SBD,” Microelectron. J., vol. 128, p. 105576, Oct. 2022, doi: 10.1016/j.mejo.2022.105576.
[39] G. Lyu, S. Feng, L. Zhang, T. Chen, J. Wei, and K. J. Chen, “GaN on engineered bulk silicon power integration platform with avalanche capability enabled by built-in Si PN junctions,” IEEE Electron Device Lett., vol. 43, no. 11, pp. 1826-1829, Nov. 2022, doi: 10.1109/LED.2022.3208909.
Year 2021
[40] J. Wei, M. Zhang, G. Lyu, and K. J. Chen, “GaN integrated bridge circuits on bulk silicon substrate: Issues and proposed solution,” IEEE J. Electron Devices Soc., vol. 9, pp. 545-551, May 2021, doi: 10.1109/JEDS.2021.3077273.
[41] J. Wei, H. Xu, R. Xie, and K. J. Chen, “Principles and impacts of dynamic threshold voltage in a p-GaN gate high-electron-mobility transistor,” Semicond. Sci. Tech., vol. 36, no. 2, p. 024006, Feb. 2021, doi: 10.1088/1361-6641/abd008.
[42] H. Xu#, J. Wei#, R. Xie, Z. Zheng, and K. J. Chen, “Incorporating the dynamic threshold voltage into the SPICE model of Schottky-type p-GaN gate power HEMTs,” IEEE Trans. Power Electron., vol. 36, no. 5, pp. 5904-5914, May 2021, doi: 10.1109/TPEL.2020.3030708.
[43] J. Sun, J. Wei, Z. Zheng, and K. J. Chen, “Short circuit capability characterization and analysis of p-GaN gate high-electron-mobility transistors under single and repetitive tests,” IEEE Trans. Ind. Electron., vol. 68, no. 9, pp. 8798-8807, Sep. 2021, doi: 10.1109/TIE.2020.3009603.
[44] Z. Zheng, L. Zhang, W. Song, S. Feng, H. Xu, J. Sun, S. Yang, T. Chen, J. Wei, and K. J. Chen, “Gallium nitride-based complementary logic integrated circuits,” Nature Electronics, vol. 4, no. 8, pp. 595-603, Aug. 2021, doi: 10.1038/s41928-021-00611-y.
[45] Z. Zheng, L. Zhang, W. Song, T. Chen, S. Feng, Y. H. Ng, J. Sun, H. Xu, S. Yang, J. Wei, and K. J. Chen, “Threshold voltage instability of enhancement-mode GaN buried p-channel MOSFETs,” IEEE Electron Device Lett., vol. 42, no. 11, pp. 1584-1587, Nov. 2021, doi: 10.1109/LED.2021.3114776.
[46] W. Lin, M. Wang, R. Yin, J. Wei, C. P. Wen, B. Xie, Y. Hao, and B. Shen, “Hydrogen-modulated step graded junction termination extension in GaN vertical p-n diodes,” IEEE Electron Device Lett., vol. 42, no. 8, pp. 1124-1127, Aug. 2021, doi: 10.1109/LED.2021.3091335.
[47] J. Chen, M. Hua, C. Wang, L. Liu, L. Li, J. Wei, L. Zhang, Z. Zheng, and K. J. Chen, “Decoupling of forward and reverse turn-on threshold voltages in Schottky-type p-GaN gate HEMTs,” IEEE Electron Device Lett., vol. 42, no. 7, pp. 986-989, 2021, doi: 10.1109/LED.2021.3077081.
[48] J. Chen, M. Hua, J. Wei, J. He, C. Wang, Z. Zheng, and K. J. Chen, “OFF-state drain-voltage-stress-induced VTH instability in Schottky-type p-GaN gate HEMTs,” IEEE J. Emerg. Sel. Topics Power Electron., vol. 9, no. 3, pp. 3686-3694, Jun. 2021, doi: 10.1109/JESTPE.2020.3010408.
[49] Y. Wang, T. Chen, M. Hua, J. Wei, Z. Zheng, W. Song, S. Yang, K. Zhong, and K. J. Chen, “A physics-based empirical model of dynamic IOFF under switching operation in p-GaN gate power HEMTs,” IEEE Trans. Power Electron., vol. 36, no. 9, pp. 9796-9805, Sep. 2021, doi: 10.1109/TPEL.2021.3062450.
[50] W. Song, Z. Zheng, T. Chen, J. Wei, L. Yuan, and K. J. Chen, “RF linearity enhancement of GaN-on-Si HEMTs with a closely coupled double-channel structure,” IEEE Electron Device Lett., vol. 42, no. 8, pp. 1116-1119, Aug. 2021, doi: 10.1109/LED.2021.3087785.
[51] M. Hua, C. Wang, J. Chen, J. Zhao, S. Yang, L. Zhang, Z. Zheng, J. Wei, and K. J. Chen, “Gate current transport in enhancement-mode p-n junction/AlGaN/GaN (PNJ) HEMT,” IEEE Electron Device Lett., vol. 42, no. 5, pp. 669-672, 2021, doi: 10.1109/LED.2021.3068296.
[52] M. Zhang, B. Li, Z. Zheng, X. Tang, and J. Wei, “A new SiC planar-gate IGBT for injection enhancement effect and low oxide field,” Energies, vol. 14, no. 1, p. 82, 2021, doi: 10.3390/en14010082.
[53] Z. Zheng, W. Song, L. Zhang, S. Yang, J. Wei, and K. J. Chen, “Monolithically integrated GaN ring oscillator based on high-performance complementary logic inverters,” IEEE Electron Device Lett., vol. 42, no. 1, pp. 26-29, Jan. 2021, doi: 10.1109/LED.2020.3039264.
Year 2020
[54] J. Wei, M. Zhang and K. J. Chen, “Superjunction IGBT with conductivity modulation actively controlled by two separate driving signals,” IEEE Trans. Electron Devices, vol. 67, no. 10, pp. 4335-4339, Oct. 2020, doi: 10.1109/TED.2020.3014284.
[55] L. Zhang#, J. Wei#, Z. Zheng, W. Song, S. Yang, H. Xu, and K. J. Chen, “p-GaN gate power transistor with distributive built-in Schottky barrier diode for low-loss reverse conduction,” IEEE Electron Device Lett., vol. 41, no. 3, pp. 341-344, Mar. 2020, doi: 10.1109/LED.2020.2968735.
[56] Z. Zheng, W. Song, L. Zhang, S. Yang, J. Wei*, and K. J. Chen*, “High ION and ION/IOFF ratio enhancement-mode buried p-channel GaN MOSFETs on p-GaN gate power HEMT platform,” IEEE Electron Device Lett., vol. 41, no. 1, Jan. 2020, doi: 10.1109/LED.2019.2954035.
[57] J. Wei, G. Tang, R. Xie, and K. J. Chen, “GaN power IC technology on p-GaN gate HEMT platform,” Jpn. J. Appl. Phys., vol. 59, no. SG, p. SG0801, Apr. 2020, doi: 10.7567/1347-4065/ab5b63.
[58] J. He, J. Wei, Y. Li, Z. Zheng, S. Yang, B. Huang, and K. Chen, “Characterization and analysis of low-temperature time-to-failure behavior in forward-biased Schottky-type p-GaN gate HEMTs,” Appl. Phys. Lett., vol. 116, no. 22, p. 223502, Jun. 2020, doi: 10.1063/5.0007763.
[59] M. Zhang, B. Li, M. Hua, and J. Wei, “Investigation of electrical contacts to p-grid in SiC power devices based on charge storage effect and dynamic degradation,” Electronics, vol. 9, no. 10, p. 1723, Oct. 2020, doi: 10.3390/electronics9101723.
[60] M. Zhang, B. Li and J. Wei, “Exploring SiC planar IGBTs towards enhanced conductivity modulation comparable to SiC trench IGBTs,” Crystals, vol. 10, no. 5, p. 417, May 2020, doi: 10.3390/cryst10050417.
[61] M. Zhang, B. Li and J. Wei, “New power MOSFET with beyond-1D-Limit RSP-BV trade-off and superior reverse recovery characteristics,” Materials, vol. 13, no. 11, p. 2581, Jun. 2020, doi: 10.3390/ma13112581.
[62] S. Yang, S. Huang, J. Wei, Z. Zheng, Y. Wang, J. He, and K. J. Chen, “Identification of trap states in p-GaN layer of a p-GaN/AlGaN/GaN power HEMT structure by deep-level transient spectroscopy,” IEEE Electron Device Lett., vol. 41, no. 5, pp. 685-688, May 2020, doi: 10.1109/LED.2020.2980150.
[63] S. Yang, Z. Tang, M. Hua, Z. Zhang, J. Wei, Y. Lu, and K. J. Chen, “Investigation of SiNx and AlN passivation for AlGaN/GaN high-electron-mobility transistors: role of surface traps and polarization charges,” IEEE J. Electron Devices Soc., vol. 8, pp. 358-364, Mar. 2020, doi: 10.1109/JEDS.2020.2984016.
[64] G. Lyu, Y. Wang, J. Wei, Z. Zheng, J. Sun, L. Zhang, and K. J. Chen, “A normally-OFF copackaged SiC-JFET/GaN-HEMT cascode device for high-voltage and high-frequency applications,” IEEE Trans. Power Electron., vol. 35, no. 9, pp. 9671-9681, Sep. 2020, doi: 10.1109/TPEL.2020.2971789.
[65] G. Lyu, Y. Wang, J. Wei, Z. Zheng, and K. J. Chen, “Dv/dt-control of 1200-V normally-off SiC-JFET/GaN-HEMT cascode device,” IEEE Trans. Power Electron., vol. 36, no. 3, pp. 3312-3322, Mar. 2020, doi: 10.1109/TPEL.2020.3015211.
[66] C. Wang, M. Hua, J. Chen, S. Yang, Z. Zheng, J. Wei, L. Zhang, and K. J. Chen, “E-mode p-n junction/AlGaN/GaN (PNJ) HEMTs,” IEEE Electron Device Lett., vol. 41, no. 4, pp. 545-548, Apr. 2020, doi: 10.1109/LED.2020.2977143.
[67] M. Hua, S. Yang, J. Wei, Z. Zheng, and K. J. Chen, “Hole-induced degradation in E-mode GaN MIS-FETs: impact of substrate terminations,” IEEE Trans. Electron Devices, vol. 67, no. 1, Jan. 2020, doi: 10.1109/TED.2019.2954282.
[68] Z. Zheng, W. Song, J. Lei, Q. Qian, J. Wei, M. Hua, S. Yang, L. Zhang, and K. J. Chen, “GaN HEMT with convergent channel for low intrinsic knee voltage,” IEEE Electron Device Lett., vol. 41, no. 9, pp. 1304-1307, Sep. 2020, doi: 10.1109/LED.2020.3010810.
[69] X. Zhou, L. Lu, J. Wei, Y. Liu, K. Wang, M. Wong, and H. Kwok, “Extracting the critical breakdown electrical field of amorphous indium-gallium-zinc-oxide from the avalanche breakdown of n-indium-gallium-zinc-oxide/p+-nickel-oxide heterojunction diode,” IEEE Electron Device Lett., vol. 41, no. 7, pp. 1017-1020, Jul. 2020, doi: 10.1109/LED.2020.2996242.
[70] Y. Wang, G. Lyu, J. Wei, Z. Zheng, J. He, J. Lei, and K. J. Chen, “Characterization of static and dynamic behavior of 1200 V normally-off GaN/SiC cascode devices,” IEEE Trans. Ind. Electron., vol. 67, no. 12, pp. 10284-10294, Dec. 2020, doi: 10.1109/TIE.2019.2959512.
Year 2019
[71] J. Wei, M. Zhang, H. Jiang, B. Li, and K. J. Chen, “Gate structure design of SiC trench IGBTs for injection-enhancement effect,” IEEE Trans. Electron Devices, vol. 66, no. 7, pp. 3034-3039, Jul. 2019, doi: 10.1109/TED.2019.2914298.
[72] J. Wei#, M. Zhang#, H. Jiang, X. Zhou, B. Li, and K. J. Chen, “Superjunction MOSFET with dual built-in Schottky diodes for fast reverse recovery: A numerical simulation study,” IEEE Electron Device Lett., vol. 40, no. 7, pp. 1155-1158, Jul. 2019, doi: 10.1109/LED.2019.2917556.
[73] J. Wei, R. Xie, H. Xu, H. Wang, Y. Wang, M. Hua, K. Zhong, G. Tang, J. He, M. Zhang, and K. J. Chen, “Charge storage mechanism of drain induced dynamic threshold voltage shift in p-GaN gate HEMTs,” IEEE Electron Device Lett., vol. 40, no. 4, pp. 526-529, Apr. 2019, doi: 10.1109/LED.2019.2900154.
[74] M. Zhang, J. Wei*, X. Zhou, H. Jiang, B. Li, and K. J. Chen, “Simulation study of a power MOSFET with built-in channel diode for enhanced reverse recovery performance,” IEEE Electron Device Lett., vol. 40, no. 1, pp. 79-82, Jan. 2019, doi: 10.1109/LED.2018.2881234.
[75] J. Sun, J. Wei, Z. Zheng, Y. Wang, and K. J. Chen, “Short circuit capability and short circuit induced VTH instability of a 1.2kV SiC power MOSFET,” IEEE J. Emerg. Sel. Topics Power Electron., vol. 7, no. 3, pp. 1539-1546, Sep. 2019, doi: 10.1109/JESTPE.2019.2912623.
[76] Y. Wang, J. Wei, S. Yang, J. Lei, M. Hua, and K. J. Chen, “Investigation of dynamic IOFF under switching operation in Schottky-type p-GaN gate HEMTs,” IEEE Trans. Electron Devices., vol. 66, no. 9, pp. 3789-3794, Sep. 2019, doi: 10.1109/TED.2019.2930315.
[77] J. He, J. Wei, S. Yang, Y. Wang, K. Zhong, and K. J. Chen, “Frequency and temperature-dependent gate reliability of Schottky-type p-GaN gate HEMTs,” IEEE Trans. Electron Devices, vol. 66, no. 8, pp. 3453-3458, Aug. 2019, doi: 10.1109/TED.2019.2924675.
[78] J. Lei, J. Wei, G. Tang, Q. Qian, Z. Zhang, M. Hua, Z. Zheng, and K. J. Chen, “Reverse-conducting normally-off double-channel AlGaN/GaN power transistor with interdigital built-in Schottky barrier diode,” IEEE Trans. Electron Devices, vol. 66, no. 5, pp. 2106-2112, May 2019, doi: 10.1109/TED.2019.2904038.
[79] M. Zhang, B. Li, J. Wei, L. Zhang, and J. Qu, “Enhanced conduction characteristics in SiC IGBT with floating p-grid shielded thick current storage layer,” ECS J. Solid State Sci. Technol., vol. 8, no. 12, pp. Q230-Q233, 2019, doi: 10.1149/2.0191911jss.
[80] Y. Wang, G. Lyu, J. Wei, Z. Zheng, J. Lei, W. Song, L. Zhang, M. Hua, and K. J. Chen, “A 1200-V GaN/SiC cascode device with E-mode p-GaN gate HEMT and D-mode SiC junction field-effect transistor,” Appl. Phys. Express, vol. 12, no. 10, p. 106505, Oct. 2019, doi: 10.7567/1882-0786/ab4741.
[81] L. Zhang, J. Zhu, S. Cao, J. Ma, J. Wei, G. Lyu, S. Li, S. Li, J. Wei, W. Wu, W. Sun, and K. J. Chen, “Mechanism and novel structure for di/dt controllability in U-shaped channel silicon-on-insulator lateral IGBTs,” IEEE Electron Device Lett., vol. 40, no. 10, pp. 1658-1661, Oct. 2019, doi: 10.1109/LED.2019.2937399.
[82] Q. Qian, J. Lei, J. Wei, Z. Zhang, G. Tang, K. Zhong, Z. Zheng, and K. J. Chen, “2D materials as semiconducting gate for field-effect transistors with inherent over-voltage protection and boosted ON-current,” npj 2D Materials and Applications, vol. 3, no. 24, Jun. 2019, doi: https://doi.org/10.1038/s41699-019-0106-6.
[83] R. Xie, X. Yang, G. Xu, J. Wei, H. Wang, M. Tian, F. Zhang, W. Chen, and L. Wang, “Switching transient analysis for normally-off GaN transistors with p-GaN gate in a phase-leg circuit,” IEEE Trans. Power Electron., vol. 34, no. 4, pp. 3711-3728, Apr. 2019, doi: 10.1109/TPEL.2018.2852142.
Year 2018
[84] J. Wei, J. Lei, X. Tang, B. Li, S. Liu, and K. J. Chen, “Channel-to-channel coupling in normally-off GaN double-channel MOS-HEMT,” IEEE Electron Device Lett., vol. 39, no. 1, pp. 59-62, Jan. 2018, doi: 10.1109/LED.2017.2771354.
[85] J. Wei#, M. Zhang#, B. Li, X. Tang, and K. J. Chen, “An analytical investigation on the charge distribution and gate control in the normally-off GaN double-channel MOS-HEMT,” IEEE Trans. Electron Devices, vol. 65, no. 7, pp. 2757-2764, Jul. 2018, doi: 10.1109/TED.2018.2831246.
[86] J. Lei#, J. Wei#, G. Tang, Z. Zhang, Q. Qian, Z. Zheng, M. Hua, and K. J. Chen, “650-V double-channel lateral Schottky barrier diode with dual-recess gated anode,” IEEE Electron Device Lett., vol. 39, no. 2, pp. 260-263, Feb. 2018, doi: 10.1109/LED.2017.2783908.
[87] J. Lei#, J. Wei#, G. Tang, Z. Zhang, Q. Qian, Z. Zheng, M. Hua, and K. J. Chen, “Reverse-blocking normally-off GaN double-channel MOS-HEMT with low reverse leakage current and on-state resistance,” IEEE Electron Device Lett., vol. 39, no. 7, pp. 1003-1006, Jul. 2018, doi: 10.1109/LED.2018.2832180.
[88] M. Hua, J. Wei, Q. Bao, Z. Zhang, Z. Zheng, and K. J. Chen, “Dependence of VTH stability on gate-bias under reverse-bias stress in E-mode GaN MIS-FET,” IEEE Electron Device Lett., vol. 39, no. 3, pp. 413-416, Mar. 2018, doi: 10.1109/LED.2018.2791664.
[89] M. Hua, J. Wei, Q. Bao, Z. Zheng, Z. Zhang, J. He, and K. J. Chen, “Hole-induced threshold voltage shift under reverse-bias stress in E-Mode GaN MIS-FET,” IEEE Trans. Electron Devices, vol. 65, no. 9, pp. 3831-3838, Sep. 2018, doi: 10.1109/TED.2018.2856998.
[90] Y. Wang, M. Hua, G. Tang, J. Lei, Z. Zheng, J. Wei, and K. J. Chen, “Dynamic OFF-state current (dynamic IOFF) in p-GaN gate HEMTs with an Ohmic gate contact,” IEEE Electron Device Lett., vol. 39, no. 9, pp. 1366-1369, Sep. 2018, doi: 10.1109/LED.2018.2852699.
[91] M. Hua, Q. Qian, J. Wei, Z. Zhang, G. Tang, and K. J. Chen, “Bias temperature instability of normally-off GaN MIS-FET with low-pressure chemical vapor deposition SiNx gate dielectric,” Phys. Status Solidi A, vol. 215, no. 10, p. 1700641, May 2018, doi: 10.1002/pssa.201700641.
[92] X. Tang, Z. Zhang, J. Wei, B. Li, J. Wang, and K. J. Chen, “Photon emission and current-collapse suppression of AlGaN/GaN field-effect transistors with photonic-ohmic drain at high temperatures,” Appl. Phys. Express, vol. 11, no. 7, p. 071003, Jul. 2018, doi: 10.7567/APEX.11.071003.
Year 2017
[93] J. Wei#, M. Zhang#, H. Jiang, H. Wang, and K. J. Chen, “Dynamic degradation in SiC trench MOSFET with a floating p-shield revealed with numerical simulations,” IEEE Trans. Electron Devices, vol. 64, no. 6, pp. 2592-2598, Jun. 2017, doi: 10.1109/TED.2017.2697763.
[94] H. Wang, J. Wei, R. Xie, C. Liu, G. Tang, and K. J. Chen, “Maximizing the performance of 650-V p-GaN gate HEMTs: dynamic RON characterization and circuit design considerations,” IEEE Trans. Power Electron., vol. 32, no. 7, pp. 5539-5549, Jul. 2017, doi: 10.1109/TPEL.2016.2610460.
[95] M. Zhang, J. Wei, H. Jiang, K. J. Chen, and C. Cheng, “A new SiC trench MOSFET structure with protruded p-base for low oxide field and enhanced switching performance,” IEEE Trans. Device and Mater. Reliab., pp. 2592-2598, Jun. 2017, doi: 10.1109/TDMR.2017.2694220.
[96] M. Zhang, J. Wei, H. Jiang, K. J. Chen, and C. Cheng, “SiC trench MOSFET with self-biased p-shield for low RON and low OFF-state oxide field,” IET Power Electron., vol. 10, no. 10, pp. 1208-1213, Aug. 2017, doi: 10.1049/iet-pel.2016.0945.
[97] M. Hua, J. Wei, G. Tang, Z. Zhang, Q. Qian, X. Cai, N. Wang, and K. J. Chen, “Normally-off LPCVD-SiNx/GaN MIS-FET with crystalline oxidation interlayer,” IEEE Electron Device Lett., vol. 38, no. 7, pp. 929-932, Jul. 2017, doi: 10.1109/LED.2017.2707473.
[98] G. Tang, J. Wei, Z. Zhang, X. Tang, M. Hua, H. Wang, and K. J. Chen, “Dynamic RON of GaN-on-Si lateral power devices with a floating substrate termination,” IEEE Electron Device Lett., vol. 38, no. 7, pp. 937-940, Jul. 2017, doi: 10.1109/LED.2017.2707529.
[99] Q. Qian, Z. Zhang, M. Hua, J. Wei, J. Lei, and K. Chen, “Remote N2 plasma treatment to deposit ultrathin high-k dielectric as tunneling contact layer for single-layer MoS2 MOSFET,” Appl. Phys. Express, vol. 10, no. 12, p. 125201, Dec. 2017, doi: 10.7567/APEX.10.125201.
[100] S. Yang, C. Zhou, S. Han, J. Wei, K. Sheng, and K. J. Chen, “Impact of substrate bias polarity on buffer-related current collapse in AlGaN/GaN-on-Si power devices,” IEEE Trans. Electron Devices, vol. 64, no. 12, pp. 5048-5056, Dec. 2017, doi: 10.1109/TED.2017.2764527.
[101] F. Wang, W. Chen, Z. Wang, R. Sun, J. Wei, X. Li, Y. Shi, X. Jin, X. Xu, N. Chen, Q. Zhou, and B. Zhang, “Simulation design of uniform low turn-on voltage and high reverse blocking AlGaN/GaN power field effect rectifier with trench heterojunction anode,” Superlattices Microstruct., vol. 105, pp. 132-138, May 2017, doi: 10.1016/j.spmi.2017.03.029.
Year 2016
[102] J. Wei, M. Zhang, H. Jiang, C. Cheng, and K. J. Chen, “Low ON-resistance SiC trench/planar MOSFET with reduced OFF-state oxide field and low gate charges,” IEEE Electron Device Lett., vol. 37, no. 11, pp. 1458-1461, Nov. 2016, doi: 10.1109/LED.2016.2609599.
[103] J. Wei, H. Jiang, Q. Jiang, and K. J. Chen, “Proposal of a GaN/SiC hybrid field-effect transistor for power switching applications,” IEEE Trans. Electron Devices, vol. 63, no. 6, pp. 2469-3473, Jun. 2016, doi: 10.1109/TED.2016.2557811.
[104] H. Jiang, J. Wei, X. Dai, M. Ke, I. Deviny, and P. Mawby, “SiC trench MOSFET with shielded fin-shaped gate to reduce oxide field and switching loss,” IEEE Electron Device Lett., vol. 37, no. 10, pp. 1324-1327, Oct. 2016, doi: 10.1109/LED.2016.2599921.
[105] B. Li, X. Tang, G. Tang, J. Wei, J. Wang, and K. J. Chen, “Switching behaviors of on-chip photon source on AlGaN/GaN-on-Si power HEMTs platform,” IEEE Photon. Tech. Lett., vol. 28, no. 24, pp. 2803-2806, Dec. 2016, doi: 10.1109/LPT.2016.2623330.
[106] X. Tang, B. Li, Z. Zhang, G. Tang, J. Wei, and K. J. Chen, “Characterization of static and dynamic behaviors in AlGaN/GaN-on-Si power transistors with photonic-Ohmic drain,” IEEE Trans. Electron Devices, vol. 63, no. 7, pp. 2831-2837, Jul. 2016, doi: 10.1109/TED.2016.2567442.
Year 2015
[107] J. Wei, S. Liu, B. Li, X. Tang, Y. Lu, C. Liu, M. Hua, Z. Zhang, G. Tang, and K. J. Chen, “Low on-resistance normally-off GaN double-channel metal-oxide-semiconductor high-electron-mobility transistor,” IEEE Electron Device Lett., vol. 36, no. 12, pp. 1287-1290, Dec. 2015, doi: 10.1109/LED.2015.2489228.
Year 2014
[108] Z. He, Y. Ni, F. Yang, J. Wei, Y. Yao, Z. Shen, P. Xiang, M. Liu, S. Wang, J. Zhang, Z. Wu, B. Zhang, and Y. Liu, “Investigations of leakage current properties in semi-insulating GaN grown on Si(111) substrate with low-temperature AlN interlayers,” J. Phys. D: Appl. Phys., vol. 47, no. 4, p. 045103, Jan. 2014, doi: 10.1088/0022-3727/47/4/045103.
[109] X. Deng, C. Rao, J. Wei, H. Jiang, M. Chen, X. Wang, and B. Zhang, “High voltage SiC JBS diodes with multiple zone junction termination extension using single etching step,” Mat. Sci. Forum, vol. 778-780, pp. 808-811, 2014, doi: 10.4028/www.scientific.net/MSF.778-780.808.
Year 2013
[110] J. Si, J. Wei, W. Chen, and B. Zhang, “Electric field distribution around drain-side gate edge in AlGaN/GaN HEMTs: analytical approach,” IEEE Trans. Electron Devices, vol. 60, no. 10, pp. 3223-3229, Oct. 2013, doi: 10.1109/TED.2013.2272055.
Year 2012
[111] 魏进, 姚尧, 张波, 刘扬, “具有逆向导通能力的 GaN 功率开关器件,” 电力电子技术, vol. 46, no. 12, pp. 67-68, Dec. 2012.
[112] H. Jiang, J. Wei, B. Zhang, W. Chen, M. Qiao, and Z. Li, “Band-to-band tunneling injection insulated-gate bipolar transistor with a soft reverse-recovery built-in diode,” IEEE Electron Device Lett., vol. 33, no. 12, pp. 1684-1686, Dec. 2012, doi: 10.1109/LED.2012.2219612.
[113] 张竞, 陈万军, 汪志刚, 魏进, 张波, “基于能带调制模型的高压增强型AlGaN/GaN HFET器件,” 固体电子学研究与进展, vol. 32, no. 6, pp. 524-530, Dec. 2012.
[114] W. Chen, J. Zhang, Z. Wang, J. Wei, B. Zhang, and K. J. Chen, “Investigation of device geometry- and temperature-dependent characteristics of AlGaN/GaN lateral field-effect rectifier,” Semicond. Sci. Tech., vol. 28, no. 1, p. 015021, Jan. 2012, doi: 10.1088/0268-1242/28/1/015021.