A 22-nm Delta-Sigma Computing-In-Memory (ΔΣCIM) SRAM Macro with Near-Zero-Mean Outputs and LSB-First ADCs Achieving 21.38TOPS/W for 8b-MAC Edge AI Processing Chen#, Peiyu, Meng Wu#, ..., Yufei Ma*, Le Ye*, and Ru HUANG. “A 22-nm Delta-Sigma Computing-In-Memory (ΔΣCIM) SRAM Macro with Near-Zero-Mean Outputs and LSB-First ADCs Achieving 21.38TOPS/W for 8b-MAC Edge AI Processing.” IEEE International Solid-State Circuits Conference (ISSCC 2023), 2023. Links
AIG-CIM: A Scalable Chiplet Module with Tri-Gear Heterogeneous Compute-in-Memory for Diffusion Acceleration Jing, Yiqi, Meng Wu, Jiaqi Zhou, Yiyang Sun, Yufei Ma, Ru HUANG, Le Ye*, and Tianyu Jia*. “AIG-CIM: A Scalable Chiplet Module with Tri-Gear Heterogeneous Compute-in-Memory for Diffusion Acceleration.” ACM/IEEE Design Automation Conference (DAC), 2024. Links
Scalable and modularized RTL compilation of Convolutional Neural Networks onto FPGA Ma, Yufei, Naveen Suda, Yu Cao, Jae-Sun Seo, and Sarma Vrudhula. “Scalable and modularized RTL compilation of Convolutional Neural Networks onto FPGA.” IEEE International Conference on Field Programmable Logic and Applications (FPL), 2016. Links
