Thinking tools that assist by externalizing thought processes and conceptual structures so they can be manipulated potentially improve user learning. We propose the design of a sensemaking assistant that integrates many such tools. Our design emerged from an intensive study of sensemaking by users working on real tasks, providing a link from users to developers. Sensemaking is the process of forming meaningful representations and working with them to gain understanding, possibly communicated in a report, to support planning, decision‑making, problem‑solving, and informed action. At the heart of our design is a set of tightly integrated tools for representing and manipulating a conceptual space: tools for producing and maintaining concept maps, causal maps/influence diagrams, argument maps, with support through self-organizing semantic maps, importing concepts and relationships from external Knowledge Organization Systems, and inferring connections between texts; further a tool for organizing information items (documents, text passages notes, images) linked to the concept map. The sensemaking assistant we envision guides users through the sensemaking process; for each function it suggests appropriate cognitive processes and provides tools that automate tasks. The comprehensive sensemaking model introduced in specifies functions in the iterative process of sensemaking: Task analysis and planning; Gap identification (tools for both: brainstorming, finding documents on the task); information acquisition, data seeking and structure seeking (search tool: finding databases, query expansion, passage retrieval; summarization tool); information organization, building structure, instantiating structure, information synthesis / new ideas / emerging sense (conceptual space tools mentioned above); information presentation, creating reports (from concept map to outline, guide through the writing process, analyze draft writing for coherence and clarity). The system tracks sources. Users using a sensemaking assistant may well internalize good ways for intellectual processes and good conceptual organization in addition to learning a useful application. The paper will provide some evidence from the literature and propose further testing.
The world is facing the dual challenge of closing a vast urban infrastructure financing gap and making urban infrastructure more climate resilient. As estimated by the OECD, USD 95 trillion will be required to develop transport, energy, water, and telecoms from 2016 to 2030 in developing countries. With the temperature rise, the extreme weather will have direct physical harm on infrastructure as the aging infrastructures would be vulnerable to storm surges and sea level rise. In order to keep global temperature rise this century well below 2 degrees Celsius above pre-industrial levels, an additional 10% of investment will be needed to develop climate resilient infrastructure, adding to the USD 6.9 trillion needed per year by 2030.
Automatic transistor sizing is a challenging problem in circuit design due to the large design space, complex performance tradeoffs, and fast technology advancements. Although there have been plenty of work on transistor sizing targeting on one circuit, limited research has been done on transferring the knowledge from one circuit to another to reduce the re-design overhead. In this paper, we present GCN-RL Circuit Designer, leveraging reinforcement learning (RL) to transfer the knowledge between different technology nodes and topologies. Moreover, inspired by the simple fact that circuit is a graph, we learn on the circuit topology representation with graph convolutional neural networks (GCN). The GCN-RL agent extracts features of the topology graph whose vertices are transistors, edges are wires. Our learning-based optimization consistently achieves the highest Figures of Merit (FoM) on four different circuits compared with conventional black box optimization methods (Bayesian Optimization, Evolutionary Algorithms), random search and human expert designs. Experiments on transfer learning between five technology nodes and two circuit topologies demonstrate that RL with transfer learning can achieve much higher FoMs than methods without knowledge transfer. Our transferable optimization method makes transistor sizing and design porting more effective and efficient.
Zeng L, Zou L, Özsu TM, Hu L, Zhang F. GSI: GPU-friendly Subgraph Isomorphism, in 36th IEEE International Conference on Data Engineering, ICDE 2020, Dallas, TX, USA, April 20-24, 2020. IEEE; 2020:1249–1260.