<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>17</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Yufei Ma*</style></author><author><style face="normal" font="default" size="100%">Yu Cao</style></author><author><style face="normal" font="default" size="100%">Sarma Vrudhula</style></author><author><style face="normal" font="default" size="100%">Jae-Sun Seo</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGA</style></title><secondary-title><style face="normal" font="default" size="100%">IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI)</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2018</style></year></dates><urls><web-urls><url><style face="normal" font="default" size="100%">https://ieeexplore.ieee.org/document/8330049</style></url></web-urls></urls><volume><style face="normal" font="default" size="100%">26</style></volume><pages><style face="normal" font="default" size="100%">1354 - 1367</style></pages><language><style face="normal" font="default" size="100%">eng</style></language><issue><style face="normal" font="default" size="100%">7</style></issue></record></records></xml>