<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>47</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Xiong, Xiong</style></author><author><style face="normal" font="default" size="100%">Liu, Shiyuan</style></author><author><style face="normal" font="default" size="100%">Liu, Honggang</style></author><author><style face="normal" font="default" size="100%">Yang Chen</style></author><author><style face="normal" font="default" size="100%">Shi, Xinhang</style></author><author><style face="normal" font="default" size="100%">Xin Wang</style></author><author><style face="normal" font="default" size="100%">Li, Xuefei</style></author><author><style face="normal" font="default" size="100%">Ru HUANG</style></author><author><style face="normal" font="default" size="100%">Wu, Yanqing</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">Top-Gate CVD WSe 2 pFETs with Record-High I d\~ 594 $μ$A/$μ$m, G m\~ 244 $μ$S/$μ$m and WSe 2/MoS 2 CFET based Half-adder Circuit Using Monolithic 3D Integration</style></title><secondary-title><style face="normal" font="default" size="100%">2022 International Electron Devices Meeting (IEDM)</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2022</style></year></dates><publisher><style face="normal" font="default" size="100%">IEEE</style></publisher><pages><style face="normal" font="default" size="100%">20–6</style></pages><language><style face="normal" font="default" size="100%">eng</style></language></record></records></xml>