Vacuum triodes have been scaled down to the microscale on a chip by microfabrication technologies to be vacuum transistors. Most of the reported devices are based on field electron emission, which suffer from the problems of unstable electron emission, poor uniformity, and high requirement for operating vacuum. Here, to overcome these problems, a vacuum transistor based on Field-Assisted thermionic emission from individual carbon nanotubes is proposed and fabricated using microfabrication technologies. The carbon nanotube vacuum transistor exhibits an ON/OFF current ratio as high as 104 and a subthreshold slope of 4 V·dec−1. The gate controllability is found to be strongly dependent on the distance between the collector electrodes and electron emitter, and a device with the distance of 1.5 μm shows a better gate controllability than that with the distance of 0.5 μm. Benefiting from Field-Assisted thermionic emission mechanism, electric field required in our devices is about one order of magnitude smaller than that in the devices based on field electron emission, and the surface of the emitters shows much less gas molecule absorption than cold field emitters. These are expected to be helpful for improving the stability and uniformity of the devices.
On-chip tunneling electron sources have wide potential applications in miniature vacuum electronic devices, and emission efficiency is one of their performance benchmarks. A cascade electron source (CES) based on series metal–insulator–metal horizontal tunneling junctions (HTJs) is proposed, where free electrons are additively extracted from each tunneling junction. A CES with $n$ HTJs shows a theoretical emission efficiency of approximately $η ( n )=1-( 1-η _0 )^n$ , with $η _0$ being the efficiency of a single tunneling junction. Experimentally, a CES with three Si–SiOx–Si tunneling junctions is demonstrated, achieving an emission efficiency of as high as 47.6%. This work provides a new way of realizing highly efficient on-chip tunneling electron sources.
A new type on-chip electron source based on electroformed SiOx is recently reported to show dense and efficient electron emission under low working voltage. Here we study the effect of the Si doping type of SiOx/Si substrate on the performances of the SiOx-based electron source fabricated on it. The electron source is composed of an array of parallelly integrated micro-emitters. Each micro-emitter is composed of a square nanogap with a width about 100 nm which is spaced by two concentric graphene films on the SiOx substrate. The inner graphene film contact with bottom Si electrode through a via hole opening to the bottom Si layer and the outer graphene film contact with the common metal electrode. Effective emission current and efficiency of the electron source are found to be significantly influenced by both the polarity of the driven voltage applied between the metal electrode and bottom Si layer and the polarity of the Schottky barrier at graphene-Si contact. The performances of electron sources can be optimized by choosing n-type doping of SiOx/Si substrate to make the positive influence of the two aspects achieved at the same time. An emission current up to 100 μA and emission density of 250 mA cm−2 are achieved for an optimized device with 64 micro-emitters at bias voltage of 32.8 V.
Thermionic electron sources are scaled down to the microscale on a chip and batch fabricated on 4-in silicon wafers by utilizing microfabrication technologies and exploiting carbon nanotubes as microscopic filaments of thermionic electron emission. The microfabricated on-chip thermionic electron sources not only satisfy the metrics of compactness and ease of batch fabrication, but also exhibit the advantages of good performance reproducibility (±6.9% variation over 100 test cycles under a driven voltage of 3.5 V) and high emission stability (fluctuation < 5% for emission current level of ≈10−8 A over 900 s) under a relatively low vacuum condition (10−4–10−2 Pa). Furthermore, to extract electrons and tune emission current, an extraction gate with a mesh is monolithically integrated with the thermionic electron sources using anodic bonding technique. The integrated electron sources exhibit a strong gate controllability and a considerable electron transmission ratio of ≈76% through the extraction gate. All these results make our devices a promising type of on-chip electron source in the applications of miniature vacuum electronic devices/systems.
Electron emission (EE) from electron sources based on island metal films (IMFs) was mainly attributed to field emission or thermionic emission from IMFs. Here, we propose a new mechanism of EE from IMF-based sources, namely, EE from horizontal tunneling junctions formed in the substrate. The devices with and without IMFs fabricated on silicon oxide substrates are found to exhibit similar EE properties, while the island-metal-film-based devices fabricated on Si3N4/Si substrate show no EE. The comparative results indicate that EE originates from the underlying silicon oxide substrate that was ignored in previous mechanisms, but not from IMFs. EE from the devices is thought to be generated from horizontal tunneling junctions in electroformed silicon oxide substrate due to the rupture of conducting filaments. Even though metal island films are not the origin of EE, they can greatly decrease the forming voltage of the devices. The insights into the emission mechanism are helpful for optimizing the electron source performances.
Abstract Special surface plays a crucial role in nature as well as in industry. Here, the surface morphology evolution of ZnO during wet etching is studied by in situ liquid cell transmission electron microscopy and ex situ wet chemical etching. Many hillocks are observed on the (0001¯) O-terminated surface of ZnO nano/micro belts during in situ etching. Nanoparticles on the apex of the hillocks are observed to be essential for the formation of the hillocks, providing direct experimental evidence of the micromasking mechanism. The surfaces of the hillocks are identified to be 011¯3¯ crystal facets, which is different from the known fact that 011¯1¯ crystal facets appear on the (0001¯) O-terminated surface of ZnO after wet chemical etching. O2 plasma treatment is found to be the key factor for the appearance of 011¯3¯ instead of 011¯1¯ crystal facets after etching for both ZnO nano/micro belts and bulk materials. The synergistic effect of acidic etching and O-rich surface caused by O2 plasma treatment is proposed to be the cause of the appearance of 011¯3¯ crystal facets. This method can be extended to control the surface morphology of other materials during wet chemical etching.
Abstract On-chip electron sources with the advantages of high emission current and density, high emission efficiency, low working voltage, and easy fabrication are highly desired for scaling down free electron-based devices and systems, especially for realizing those on a chip, but remain challenging. Here, such an on-chip electron source is reported simply based on electroformed silicon oxide between concentric graphene films on silicon oxide substrate. It is demonstrated that electron emission from an electron emitter can be driven by a low voltage about 11 V, and a high emission efficiency of 33.6%. An on-chip electron source with 36 × 36 emitter array in an area of 594 × 594 µm2 exhibits an emission current up to 1 mA at 38 V working voltage, corresponding to a high emission density of 283 mA cm−2. Electron emission from the sources is thought to be generated from horizontal tunneling diodes formed in electroformed silicon oxide. Combined advantages of high emission current and density, high emission efficiency, low working voltage, and easy fabrication make this on-chip electron sources promising in realizing miniature and on-chip free electron-based devices and systems.
Abstract An important advancement towards the realization of miniaturized and fully integrated vacuum electronic devices will be the development of on-chip integrated electron sources with stable and reproducible performances. Here, the fabrication of high-performance on-chip thermionic electron micro-emitter arrays is demonstrated by exploiting suspended super-aligned carbon nanotube films as thermionic filaments. For single micro-emitter, an electron emission current up to ≈20 µA and density as high as ≈1.33 A cm−2 are obtained at a low-driven voltage of 3.9 V. The turn-on/off time of a single micro-emitter is measured to be less than 1 µs. Particularly, stable (±1.2% emission current fluctuation for 30 min) and reproducible (±0.2% driven voltage variation over 27 cycles) electron emission have been experimentally observed under a low vacuum of ≈5 × 10−4 Pa. Even under a rough vacuum of ≈10−1 Pa, an impressive reproducibility (±2% driven voltage variation over 20 cycles) is obtained. Moreover, emission performances of micro-emitter arrays are found to exhibit good uniformity. The outstanding stability, reproducibility, and uniformity of the thermionic electron micro-emitter arrays imply their promising applications as on-chip integrated electron sources.
Nanoelectronic devices with specifically designed structures for performance promotion or function expansion are of great interest, aiming for diversified advanced nanoelectronic systems. In this work, we report a dual-material gate (DMG) carbon nanotube (CNT) device with multiple functions, which can be configured either as a high-performance p-type field-effect transistor (FET) or a diode by changing the input manners of the device. When operating as a FET, the device exhibits a large current on/off ratio of more than 108 and a drain-induced barrier lowering of 97.3 mV V−1. When configured as a diode, the rectification ratio of the device can be greater than 105. We then demonstrate configurable analog and digital integrated circuits that are enabled by utilizing these devices. The configurability enables the realization of transformable functions in a single device or circuits, which gives future electronic systems the flexibility to adapt to the diverse requirements of their applications and/or ever-changing operating environments.
Abstract Electrically driven on-chip electron sources that do not need to be heated are long pursued, but their realization remains challenging. Here, it is shown that a nanogap formed by two electrodes on a silicon oxide substrate functions as an electron-emitting nanodiode after the silicon oxide in the nanogap is electrically switched to a high-resistance conducting state. A nanodiode based on graphene electrodes can be turned on by a voltage of ≈7 V in ≈100 ns and show an emission current of up to several microamperes, corresponding to an emission density of ≈106 A cm−2 and emission efficiency as high as 16.6%. We attribute the electron emission to be generated from a metal–insulator–metal tunneling diode on the substrate surface formed by the rupture of conducting filaments in silicon oxide. An array of 100 nanodiodes exhibits a global emission density of 5 A cm−2 and stable emission with negligible current degradation over tens of hours under modest vacuum. The combined advantages of a low operating voltage, fast temporal response, high emission density and efficiency, convenient fabrication and integration, and stable emission in modest vacuum make silicon oxide electron-emitting nanodiodes a promising on-chip electron sources.
Line-shape engineering is a key strategy to endow extra stretchability to 1D silicon nanowires (SiNWs) grown with self-assembly processes. We here demonstrate a deterministic line-shape programming of in-plane SiNWs into extremely stretchable springs or arbitrary 2D patterns with the aid of indium droplets that absorb amorphous Si precursor thin film to produce ultralong c-Si NWs along programmed step edges. A reliable and faithful single run growth of c-SiNWs over turning tracks with different local curvatures has been established, while high resolution transmission electron microscopy analysis reveals a high quality monolike crystallinity in the line-shaped engineered SiNW springs. Excitingly, in situ scanning electron microscopy stretching and current–voltage characterizations also demonstrate a superelastic and robust electric transport carried by the SiNW springs even under large stretching of more than 200%. We suggest that this highly reliable line-shape programming approach holds a strong promise to extend the mature c-Si technology into the development of a new generation of high performance biofriendly and stretchable electronics.
The influence of water vapor on the electronic property of MoS2 field effect transistors (FETs) is studied through controlled experiments. We fabricate supported and suspended FETs on the same piece of MoS2 to figure out the role of SiO2 substrate on the water sensing property of MoS2. The two kinds of devices show similar response to water vapor and to different treatments, such as pumping in the vacuum, annealing at 500 K and current annealing, indicating the substrate does not play an important role in the MoS2 water sensor. Water adsorption is found to decrease the carrier mobility probably through introducing a scattering center on the surface of MoS2. The threshold voltage and subthreshold swing of the FETs do not change obviously after introducing water vapor, indicating there is no obvious doping and trap introducing effects. Long time pumping in a high vacuum and 500 K annealing show negligible effects on removing the water adsorption on the devices. Current annealing at high source-drain bias is found to be able to remove the water adsorption and set the FETs to their initial states. The mechanism is proposed to be through the hot carriers at high bias.