<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>17</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Ying Liu</style></author><author><style face="normal" font="default" size="100%">Zhiyuan Chen</style></author><author><style face="normal" font="default" size="100%">Wentao Zhao</style></author><author><style face="normal" font="default" size="100%">Tianhao Zhao</style></author><author><style face="normal" font="default" size="100%">Tianyu Jia</style></author><author><style face="normal" font="default" size="100%">Wang, Zhixuan</style></author><author><style face="normal" font="default" size="100%">Ru HUANG</style></author><author><style face="normal" font="default" size="100%">Ye, Le</style></author><author><style face="normal" font="default" size="100%">Yufei Ma</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">Sparsity-Aware In-Memory Neuromorphic Computing Unit with Configurable Topology of Hybrid Spiking and Artificial Neural Network</style></title><secondary-title><style face="normal" font="default" size="100%">IEEE Transactions on Circuits and Systems I: Regular Papers</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2024</style></year></dates><language><style face="normal" font="default" size="100%">eng</style></language></record></records></xml>