<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>47</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Y. Liu</style></author><author><style face="normal" font="default" size="100%">Y. Ma</style></author><author><style face="normal" font="default" size="100%">N. Shang</style></author><author><style face="normal" font="default" size="100%">T. Zhao</style></author><author><style face="normal" font="default" size="100%">P. Chen</style></author><author><style face="normal" font="default" size="100%">M. Wu</style></author><author><style face="normal" font="default" size="100%">J. Ru</style></author><author><style face="normal" font="default" size="100%">T. Jia</style></author><author><style face="normal" font="default" size="100%">L. Ye</style></author><author><style face="normal" font="default" size="100%">Z. Wang</style></author><author><style face="normal" font="default" size="100%">R. Huang</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">A 22nm 0.26nW/synapse spike-driven spiking neural network processing unit using time-step-first dataflow and sparsity-adaptive in-memory computing</style></title><secondary-title><style face="normal" font="default" size="100%">IEEE International Solid-State Circuits Conference (ISSCC)</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2024</style></year></dates><language><style face="normal" font="default" size="100%">eng</style></language></record></records></xml>