<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>47</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">T. Tambe</style></author><author><style face="normal" font="default" size="100%">J. Zhang</style></author><author><style face="normal" font="default" size="100%">C. Hooper</style></author><author><style face="normal" font="default" size="100%">Jia, T.</style></author><author><style face="normal" font="default" size="100%">P. N. Whatmough</style></author><author><style face="normal" font="default" size="100%">J. Zuckerman</style></author><author><style face="normal" font="default" size="100%">M. Cassel Dos Santos</style></author><author><style face="normal" font="default" size="100%">E. J. Loscalzo</style></author><author><style face="normal" font="default" size="100%">D. Giri</style></author><author><style face="normal" font="default" size="100%">K. Shepard</style></author><author><style face="normal" font="default" size="100%">L. Carloni</style></author><author><style face="normal" font="default" size="100%">A. Rush</style></author><author><style face="normal" font="default" size="100%">D. Brooks</style></author><author><style face="normal" font="default" size="100%">G-Y. Wei</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">A 12nm 18.1TFLOPs/W sparse transformer processor with entropy-based early exit, mixed-precision predication and fine-grained power management</style></title><secondary-title><style face="normal" font="default" size="100%">IEEE International Solid-State Circuits Conference (ISSCC)</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2023</style></year></dates><language><style face="normal" font="default" size="100%">eng</style></language></record></records></xml>