<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>47</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Chen, Peiyu</style></author><author><style face="normal" font="default" size="100%">Wu, Meng</style></author><author><style face="normal" font="default" size="100%">Wentao Zhao</style></author><author><style face="normal" font="default" size="100%">J. Cui</style></author><author><style face="normal" font="default" size="100%">Z. Wang</style></author><author><style face="normal" font="default" size="100%">Y. Zhang</style></author><author><style face="normal" font="default" size="100%">Q. Wang</style></author><author><style face="normal" font="default" size="100%">J. Ru</style></author><author><style face="normal" font="default" size="100%">Shen, L.</style></author><author><style face="normal" font="default" size="100%">Jia, T.</style></author><author><style face="normal" font="default" size="100%">Y. Ma</style></author><author><style face="normal" font="default" size="100%">L. Ye</style></author><author><style face="normal" font="default" size="100%">R. Huang</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">A 22-nm delta-sigma computing-in-memory (ΔΣCIM) SRAM macro with near-zero-mean outputs and LSB-first ADCs achieving 21.38TOPS/W for 8b-MAC edge AI processing</style></title><secondary-title><style face="normal" font="default" size="100%">IEEE International Solid-State Circuits Conference (ISSCC)</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2023</style></year></dates><language><style face="normal" font="default" size="100%">eng</style></language></record></records></xml>