本文在先前文献的基础上，考虑到二元体制对中国城乡收入差距的决定性意义，引入城镇内收入差距的概念。文章运用中国31个省级行政单位1991–2008年的面板数据，分别对金融发展与城乡间、城镇内收入差距之间的关系进行了实证研究。结果显示，不论是城乡间还是城镇内，金融发展对收入差距的影响均存在倒U型的库兹涅茨效应。基于1997–2012年城乡财产性收入数据的研究也具有一致性。本文实证结果支持了Greenwood and Jovanovic (1990)所提出的门槛理论，即收入差距的扩大并非因为金融发展不具有正外部性，而是因为贫困者无法享受到此类福利。本文建议相关的制度设计应更加关注农村居民和低收入者。
This paper presents a 3-stage differential cascode power amplifier (PA) for 109–137 GHz applications. At 120 GHz the circuit delivers 16.5 dBm saturated output power with 12.8 % power-added efficiency (PAE) without using power combining techniques. The chip was fabricated in 130 nm SiGe BiCMOS technology offering heterojunction bipolar transistors (HBT) with f T /f max of 300/500 GHz. The PA consists of three stages optimized accordingly to the design goals. The first stage operates in class A to provide high gain while the two following stages are biased in class AB and deep class AB in order to increase the efficiency. The circuit draws a maximum current of 100 mA from 3.3 V and 4 V supplies. It occupies only 0.24 mm 2 chip area excluding baluns and bondpads, which makes it attractive for future power combiners. The presented amplifier is suitable for radar applications, that require a high dynamic range.
This paper presents a highly power efficient amplifier. By stacking inverters and splitting the capacitor feedback network, the proposed amplifier achieves 6-time current reuse, thereby significantly boosting gm and lowering noise but without increasing power. A novel biasing scheme is devised to ensure robust operation under 1V supply. A prototype in 180nm CMOS has 5.5uV rms noise within 10kHz BW while consuming only 0.25uW, leading to a noise efficiency factor (NEF) of 1.07, which is the best among reported amplifiers.
