<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>47</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Xin Zhang</style></author><author><style face="normal" font="default" size="100%">Jiajun Zou</style></author><author><style face="normal" font="default" size="100%">Yang, Yi</style></author><author><style face="normal" font="default" size="100%">Qingni Shen</style></author><author><style face="normal" font="default" size="100%">Zhi Zhang</style></author><author><style face="normal" font="default" size="100%">Yansong Gao</style></author><author><style face="normal" font="default" size="100%">Wu, Zhonghai</style></author><author><style face="normal" font="default" size="100%">Trevor E. Carlson</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">LeakyDSP: Exploiting Digital Signal Processing Blocks to Sense Voltage Fluctuations in FPGAs</style></title><secondary-title><style face="normal" font="default" size="100%">62nd ACM/IEEE Design Automation Conference, DAC 2025, San Francisco, CA, USA, June 22-25, 2025</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2025</style></year></dates><urls><web-urls><url><style face="normal" font="default" size="100%">https://doi.org/10.1109/DAC63849.2025.11132492</style></url></web-urls></urls><publisher><style face="normal" font="default" size="100%">IEEE</style></publisher><pages><style face="normal" font="default" size="100%">1–7</style></pages><language><style face="normal" font="default" size="100%">eng</style></language></record></records></xml>