<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>17</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Zhen Yang</style></author><author><style face="normal" font="default" size="100%">Wang, Jinyan</style></author><author><style face="normal" font="default" size="100%">Li, Xiaoping</style></author><author><style face="normal" font="default" size="100%">Bo Zhang</style></author><author><style face="normal" font="default" size="100%">Zhao, Jian</style></author><author><style face="normal" font="default" size="100%">Xu, Zhe</style></author><author><style face="normal" font="default" size="100%">Wang, Maojun</style></author><author><style face="normal" font="default" size="100%">Min Yu</style></author><author><style face="normal" font="default" size="100%">Yang, Zhenchuan</style></author><author><style face="normal" font="default" size="100%">Wu, Wengang</style></author><author><style face="normal" font="default" size="100%">Zhang, Yuming</style></author><author><style face="normal" font="default" size="100%">Zhang, Jincheng</style></author><author><style face="normal" font="default" size="100%">Ma, Xiaohua</style></author><author><style face="normal" font="default" size="100%">Hao, Yue</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">A novel method for measuring parasitic resistance in high electron mobility transistors</style></title><secondary-title><style face="normal" font="default" size="100%">SOLID-STATE ELECTRONICS</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2014</style></year><pub-dates><date><style  face="normal" font="default" size="100%">OCT</style></date></pub-dates></dates><volume><style face="normal" font="default" size="100%">100</style></volume><pages><style face="normal" font="default" size="100%">27-32</style></pages><language><style face="normal" font="default" size="100%">eng</style></language><abstract><style face="normal" font="default" size="100%">A novel simple approach to extract parasitic source and drain resistances of high electron mobility transistors (HEMT) is presented. This method could obtain the parasitic resistances by determining the portion of channel resistance involved in the measured end-resistance based on the identification of the channel position corresponding to the measured floating-gate voltage with the floating-gate, drain-and source-current-injection configurations on a single device. The technique is demonstrated on AlGaN/GaN HEMTs. It is found that the ratio of the channel resistance involving in the end-resistance to the total channel resistance approaches to a constant independent on the gate length, which could simplify the practical application of this novel method. The experimental results show that the source and drain resistances extracted by this method coincide with series resistance extracted by traditional Transmission Line Model (TLM) measurement. (C) 2014 Elsevier Ltd. All rights reserved.</style></abstract><custom7><style face="normal" font="default" size="100%">000341475500006</style></custom7></record></records></xml>