<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>17</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Wang, Maojun</style></author><author><style face="normal" font="default" size="100%">Yan, Dawei</style></author><author><style face="normal" font="default" size="100%">Zhang, Chuan</style></author><author><style face="normal" font="default" size="100%">Xie, Bing</style></author><author><style face="normal" font="default" size="100%">Wen, Cheng P.</style></author><author><style face="normal" font="default" size="100%">Wang, Jinyan</style></author><author><style face="normal" font="default" size="100%">Hao, Yilong</style></author><author><style face="normal" font="default" size="100%">Wu, Wengang</style></author><author><style face="normal" font="default" size="100%">Shen, Bo</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">Investigation of Surface- and Buffer-Induced Current Collapse in GaN High-Electron Mobility Transistors Using a Soft Switched Pulsed I-V Measurement</style></title><secondary-title><style face="normal" font="default" size="100%">IEEE ELECTRON DEVICE LETTERS</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2014</style></year><pub-dates><date><style  face="normal" font="default" size="100%">NOV</style></date></pub-dates></dates><number><style face="normal" font="default" size="100%">11</style></number><volume><style face="normal" font="default" size="100%">35</style></volume><pages><style face="normal" font="default" size="100%">1094-1096</style></pages><language><style face="normal" font="default" size="100%">eng</style></language><abstract><style face="normal" font="default" size="100%">In this letter, we investigated the behaviors of surface-and buffer-induced current collapse in AlGaN/GaN high-electron mobility transistors (HEMTs) using a soft-switched pulsed I-V measurement with different quiescent bias points. It is found that the surface-and buffer-related current collapse have different relationship with the gate and drain biases (V-GS0, V-DS0) during quiescent bias stress. The surface-induced current collapse in devices without passivation monotonically increases with the negative V-GS0, suggesting that an electron injection to the surface from gate leakage is the dominant mechanism and the Si3N4 passivation could effectively eliminate such current collapse. The buffer-induced current collapse in devices with intentionally carbon-doped buffer layer exhibits a different relationship with V-GS0 after surface passivation. The buffer-related current collapse shows a bell-shaped behavior with V-GS0, suggesting that a hot electron trapping in the buffer is the dominant mechanism. The soft-switched pulsed I-V measurement provides an effective method to distinguish between the surface-and buffer-related current collapse in group III-nitride HEMTs.</style></abstract><custom7><style face="normal" font="default" size="100%">000344588100008</style></custom7></record></records></xml>