<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>17</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Ying Liu</style></author><author><style face="normal" font="default" size="100%">Yufei Ma</style></author><author><style face="normal" font="default" size="100%">Wei He</style></author><author><style face="normal" font="default" size="100%">Wang, Zhixuan</style></author><author><style face="normal" font="default" size="100%">Shen, Linxiao</style></author><author><style face="normal" font="default" size="100%">Ru, Jiayoon</style></author><author><style face="normal" font="default" size="100%">Ru HUANG</style></author><author><style face="normal" font="default" size="100%">Ye, Le</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">An 82-nW 0.53-pJ/SOP Clock-Free Spiking Neural Network With 40-μs Latency for AIoT Wake-Up Functions Using a Multilevel-Event-Driven Bionic Architecture and Computing-in-Memory Technique</style></title><secondary-title><style face="normal" font="default" size="100%">IEEE Transactions on Circuits and Systems I: Regular Papers</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2023</style></year></dates><number><style face="normal" font="default" size="100%">8</style></number><volume><style face="normal" font="default" size="100%">70</style></volume><pages><style face="normal" font="default" size="100%">3075-3088</style></pages><language><style face="normal" font="default" size="100%">eng</style></language></record></records></xml>