<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>47</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Gao, Jihang</style></author><author><style face="normal" font="default" size="100%">Shen, Linxiao</style></author><author><style face="normal" font="default" size="100%">Li, Heyi</style></author><author><style face="normal" font="default" size="100%">Ye, Siyuan</style></author><author><style face="normal" font="default" size="100%">Jie Li</style></author><author><style face="normal" font="default" size="100%">Xinhang Xu</style></author><author><style face="normal" font="default" size="100%">Jiajia Cui</style></author><author><style face="normal" font="default" size="100%">Gao, Yunhung</style></author><author><style face="normal" font="default" size="100%">Ru HUANG</style></author><author><style face="normal" font="default" size="100%">Ye, Le</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">23.1 A 7.9fJ/Conversion-Step and 37.12aFrms Pipelined-SAR Capacitance-to-Digital Converter with kT/C Noise Cancellation and Incomplete-Settling-Based Correlated Level Shifting</style></title><secondary-title><style face="normal" font="default" size="100%">2023 IEEE International Solid- State Circuits Conference (ISSCC)</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2023</style></year></dates><pages><style face="normal" font="default" size="100%">346-348</style></pages><language><style face="normal" font="default" size="100%">eng</style></language></record></records></xml>