<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>47</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Chen, Peiyu</style></author><author><style face="normal" font="default" size="100%">Wu, Meng</style></author><author><style face="normal" font="default" size="100%">Wentao Zhao</style></author><author><style face="normal" font="default" size="100%">Jiajia Cui</style></author><author><style face="normal" font="default" size="100%">Wang, Zhixuan</style></author><author><style face="normal" font="default" size="100%">Yadong Zhang</style></author><author><style face="normal" font="default" size="100%">Qijun Wang</style></author><author><style face="normal" font="default" size="100%">Ru, Jiayoon</style></author><author><style face="normal" font="default" size="100%">Shen, Linxiao</style></author><author><style face="normal" font="default" size="100%">Tianyu Jia</style></author><author><style face="normal" font="default" size="100%">Yufei Ma</style></author><author><style face="normal" font="default" size="100%">Ye, Le</style></author><author><style face="normal" font="default" size="100%">Ru HUANG</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">7.8 A 22nm Delta-Sigma Computing-In-Memory (Δ∑CIM) SRAM Macro with Near-Zero-Mean Outputs and LSB-First ADCs Achieving 21.38TOPS/W for 8b-MAC Edge AI Processing</style></title><secondary-title><style face="normal" font="default" size="100%">2023 IEEE International Solid- State Circuits Conference (ISSCC)</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2023</style></year></dates><pages><style face="normal" font="default" size="100%">140-142</style></pages><language><style face="normal" font="default" size="100%">eng</style></language></record></records></xml>