@article {8947992,
	title = {An Energy-Efficient Comparator With Dynamic Floating Inverter Amplifier},
	journal = {IEEE Journal of Solid-State Circuits},
	volume = {55},
	number = {4},
	year = {2020},
	month = {April},
	pages = {1011-1022},
	abstract = {This article presents an energy-efficient comparator design. The pre-amplifier adopts an inverter-based input pair powered by a floating reservoir capacitor; it realizes both current reuse and dynamic bias, thereby significantly boosting gm/ID and reducing noise. Moreover, it greatly reduces the influence of the process corner and the input common-mode voltage on the comparator performance, including noise, offset, and delay. A prototype comparator in 180 nm achieves 46-μV input-referred noise while consuming only 1 pJ per comparison under a 1.2-V supply. This represents greater than seven-time energy efficiency boost compared with a strong-arm (SA) latch. It achieves the highest reported comparator energy efficiency to the best of our knowledge.},
	issn = {1558-173X},
	doi = {10.1109/JSSC.2019.2960485},
	author = {Xiyuan TANG and Shen, Linxiao*(Corresponding Author) and Kasap, Begum and Yang, Xiangxing and Wei Shi and Mukherjee, Abhishek and Pan, David Z. and Sun, Nan}
}
