@conference {9772794,
	title = {A 77μW 115dB-Dynamic-Range 586fA-Sensitivity Current-Domain Continuous-Time Zoom ADC with Pulse-Width-Modulated Resistor DAC and Background Offset Compensation Scheme},
	booktitle = {2022 IEEE Custom Integrated Circuits Conference (CICC)},
	year = {2022},
	pages = {1-2},
	abstract = {High-precision large dynamic-range (DR) current-sensing front-ends are widely used in biomedical applications, such as patch-clamp, molecular concentration detection, and gene sequencing. The new gene sequencers require low-noise analog front-ends capable of sensing large DR current (\&gt;100 dB) down to sub-pA-level. At this level of precision, oversampled data converters are usually used. However, given the limited oversampling ratio in high throughput applications, it is very challenging to achieve a sub-pA-level sensitivity and \&gt;100dB DR within the limited area and energy budgets [1]. In [2], a 140dB DR is achieved using a multi-bit delta-sigma modulator (DSM), but the power consumption is over 1mW and the current sensitivity is limited to 6.3pA. An hourglass ADC achieving a 100fA sensitivity and 140dB DR is presented in [3], but is limited by conversion rate and relatively high power consumption (295μW). For a 100Hz bandwidth, its noise floor increases to 18pA.},
	doi = {10.1109/CICC53496.2022.9772794},
	url = {https://ieeexplore.ieee.org/document/9772794},
	author = {Hao Zhang and Shen, Linxiao and Zhang, Shichuang and Li, Heyi and Zhang, Yihan and Tan, Zhichao and Ru HUANG and Ye, Le}
}
