A Reliable 2 bit MLC FeFET with High Uniformity and 109 Endurance by Gate Stack and Write Pulse Co-optimization - Zhou, Yuejia; Huang, Weiqin; Zhu, Runteng; Ru HUANG; Tang, Kechao (2024 IEEE European Solid-State Electronics Research Conference (ESSERC), 2024)
Keywords: Device-to-device communication; Electric breakdown; Endurance; Europe; FeFETs; Gate leakage; Grain size; Logic gates; multi-level cell (MLC) FeFET; Optimization; pulse scheme; Reliability engineering; uniformity; Writing