@article {10734135,
	title = {A Compact Writing Scheme for the Reliability Challenges in 1T Multi-level FeFET Array: Variation, Endurance and Write Disturb},
	journal = {IEEE Electron Device Letters},
	year = {2024},
	pages = {1-1},
	keywords = {Costs, Electrons, endurance recovery, Error correction, FeFETs, iron, Logic gates, multi-level cell (MLC) FeFET, Performance evaluation, Reliability, tin, variation, write disturb, Writing, writing scheme},
	doi = {10.1109/LED.2024.3485803},
	author = {Zhou, Yuejia and Shao, Hanyong and Huang, Weiqin and Zhu, Runteng and Zhang, Yihan and Ru HUANG and Tang, Kechao}
}
